• ETRI Journal
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• v.36 no.6
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• pp.924-930
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• 2014

This paper presents a $0.13{\mu}m$ CMOS 3-level envelope delta-sigma modulation (EDSM) RF signal generator, which synthesizes a 2.6 GHz-centered fully symmetrical 3-level EDSM signal for high-efficiency power amplifier architectures. It consists of an I-Q phase modulator, a Class B wideband buffer, an up-conversion mixer, a D2S, and a Class AB wideband drive amplifier. To preserve fast phase transition in the 3-state envelope level, the wideband buffer has an RLC load and the driver amplifier uses a second-order BPF as its load to provide enough bandwidth. To achieve an accurate 3-state envelope level in the up-mixer output, the LO bias level is optimized. The I-Q phase modulator adopts a modified quadrature passive mixer topology and mitigates the I-Q crosstalk problem using a 50% duty cycle in LO clocks. The fabricated chip provides an average output power of -1.5 dBm and an error vector magnitude (EVM) of 3.89% for 3GPP LTE 64 QAM input signals with a channel bandwidth of 10/20 MHz, as well as consuming 60 mW for both channels from a 1.2 V/2.5 V supply voltage.

• ETRI Journal
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• v.29 no.5
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• pp.670-672
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• 2007

An ultra-wideband low-noise amplifier is proposed with operation up to 8.2 GHz. The amplifier is fabricated with a 0.18-${\mu}m$ CMOS process and adopts a two-stage cascode architecture and a simplified Chebyshev filter for high gain, wide band, input-impedance matching, and low noise. The gain of 19.2 dB and minimum noise figure of 3.3 dB are measured over 3.4 to 8.2 GHz while consuming 17.3 mW of power. The Proposed UWB LNA achieves a measured power-gain bandwidth product of 399.4 GHz.

• Journal of Navigation and Port Research
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• v.27 no.2
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• pp.209-215
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• 2003

In this paper. We tested and fabricated the error amplifier for the 15 Watt linear power amplifier for the IMT-2000 baseband station. The error amplifier was comprised of subtractor for detecting intermodulation distortion, variable attenuator for control amplitude, variable phase shifter for control phase, low power amplifier and high power amplifier. This component was designed on the RO4350 substrate and integrated the aluminum case with active biasing circuit. For suppression of spurious, the through capacitance was used. The characteristics of error amplifier measured up to 45 dB gain, $\pm$0.66 dB gain flatness and -15 dB input return loss. Results of application to the 15 Watt feedforward Linear Power Amplifier, the error amplifier improved with 27 dB cancellation from 34 dBc to 61 dBc IM$_3$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.1
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• pp.53-61
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• 2014

In this paper, we present the design, fabrication and measurement of high efficiency GaN HEMT power amplifier using harmonic matching technique. In order to achieve high efficiency, harmonic load-pull simulation is performed, that is, the optimum load impedances are determined at $2^{nd}$ and $3^{rd}$ harmonic frequencies as well as at the fundamental. Then, the output matching circuit is designed based on harmonic load-pull simulation. The measurement of the fabricated power amplifier shows the linear gain of 20 dB and $P_{1dB}$(1 dB gain compression point) of 33.7 dBm at 1.85 GHz. The maximum power added efficiency(PAE) of 80.9 % is achieved at the output power of 38.6 dBm, which belongs to best efficiency performance among the reported high efficiency power amplifiers. For W-CDMA input signal, the power amplifier shows a PAE of 27.8 % at the average output power of 28.4 dBm, where an ACLR (Adjacent Channel Leakage Ratio) is measured to be -38.8 dBc. Digital predistortion using polynomial fitting was implemented to linearize the power amplifiers, which allowed about 6.2 dB improvement of an ACLR performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.5
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• pp.393-396
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• 2018

Herein, a 94-GHz low-noise amplifier (LNA) using the 65-nm CMOS process is presented. The LNA is composed of a four-stage differential common-source amplifier and impedance matching is accomplished with transformers. The fabricated LNA chip shows a peak gain of 25 dB at 94 GHz and has a 3-dB bandwidth at 5.5 GHz. The chip consumes 46 mW of DC power from a 1.2-V supply, and the total chip area, including the pads, is $0.3mm^2$.

• KIEE International Transactions on Electrophysics and Applications
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• v.11C no.4
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• pp.99-106
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• 2001

An overview of Silicon Carbide (SiC) Static Induction Transistor (SIT) development is presented. Basic conduction mechanisms are introduced and discussed, including ohmic, exponential, and space charge limited conduction (SCLC) mechanisms. Additionally, the impact of velocity saturation and temperature effects on SCLC are reviewed. The small-signal model, breakdown voltage, power density, and different gate structures are also discussed, before a final review of published SiC SIT results. Published S-band (3-4 GHz) results include 9.5 dB of gain and output power of 120 W, and L-band (1.3 GHz) results include 400 W output power, 7.7 dB of gain, and power density of 16.7 W/cm.

• Korean Journal of Optics and Photonics
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• v.32 no.4
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• pp.187-194
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• 2021

This paper presents a study of laser output characteristics. We fabricated a MOPA (master oscillator power amplifier)-type high-power, narrowbandwidth fiber laser with a bidirectional pumping configuration in its main amplifier. As signal beams, light sources with bandwidths of 3 GHz and 10 GHz-phase-modulated through a PRBS (pseudo-random binary sequence)-were used interchangeably. Furthermore, the characteristics of the SBS (stimulated Brillouin scattering) were analyzed using a signal beam with 3 GHz bandwidth, by adjusting the forward to backward pumppower ratio. Moreover, the characteristics of the transverse mode instability were analyzed by adjusting the forward to backward pump-power ratio, using a signal beam with 10-GHz bandwidth. Finally, the output power from 10 GHz bandwidth was amplified to more than 1 kW using a forward to backward pump-power ratio of 1.6. The beam quality M² was measured to be approximately 1.36, and the optical-to-optical efficiency was 80% at maximum output power.

• Korean Journal of Optics and Photonics
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• v.27 no.3
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• pp.95-100
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• 2016

High-power quasi-continuous-wave (qcw) operation in Yb-doped double-clad fiber lasers with near-diffraction-limited quality of the output beam is reported. Based on numerical simulation, we built a simple, all-fiberized Yb fiber laser, and a fiber-based master-oscillator power amplifier (MOPA). Both laser systems have successfully produced qcw output with average power greater than 150 W at 1080 nm and 10 ms pulse duration at 10 Hz repetition rate, corresponding to a peak power greater than 1.5 kW for 205 W of pump power at 976 nm. Laser performance, including beam quality and slope efficiency, was characterized in both configurations. Prospects for power scaling and applications are discussed.

• Korean Journal of Optics and Photonics
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• v.31 no.1
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• pp.7-12
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• 2020

In this paper, we experimentally investigate the fiber fuse in single-mode 2-kW-class high-power fiber amplifiers, depending on the cooling method at the splicing point. We measured the temperature of the splicing point between the pump-signal combiner and gain fiber as a function of laser output power. The temperature of the splicing point increased from 20 to 32℃ with a slope of 0.01℃/W, up to 1.2 kW of laser output power. At higher powers the temperature of the splicing point increased dramatically, with a slope of 0.08℃/W. After that, the fiber amplifier was destroyed during operation at 1.96 kW of output power by fiber fuse. The bullet shape, a common feature of fiber fuse, was observed in the damaged passive fiber core of the pump-signal combiner. Later, we adopted an improved water-cooled cold plate to increase the cooling efficiency at the splicing point, and investigated the laser output power. The temperature at the splicing point was 35.8℃ with a temperature-rise slope of 0.007℃/W at the maximum output power of 2.05 kW. The beam quality M² was measured to be less than 1.3, and the output beam's profile was a stable Gaussian shape. Finally, neither fiber fuse nor mode instability was observed in the fiber amplifier at the maximum output power of 2.05 kW.

• Journal of Electrical Engineering and Technology
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• v.3 no.4
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• pp.566-570
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• 2008

Vertical nanowire SGFETs(Surrounding Gate Field Effect Transistors) provide full gate control over the channel to eliminate short channel effects. This paper presents design and characterization of a differential pair amplifier using NMOS and PMOS SGFETs with a 10nm channel length and a 2nm channel radius. The amplifier dissipates $5{\mu}W$ power and provides 5THz bandwidth with a voltage gain of 16, a linear output voltage swing of 0.5V, and a distortion better than 3% from a 1.8V power supply and a 20aF capacitive load. The 2nd and 3rd order harmonic distortions of the amplifier are -40dBm and -52dBm, respectively, and the 3rd order intermodulation is -24dBm for a two-tone input signal with 10mV amplitude and 10GHz frequency spacing. All these parameters indicate that vertical nanowire surrounding gate transistors are promising candidates for the next generation high speed analog and VLSI technologies.