• Proceedings of the KWS Conference
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• 2007.11a
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• pp.229-231
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• 2007

Recently, 3D-electronic packaging by TSV is in interest. TSV(Through Silicon Via) is a interconnection hole on Si-wafer filled with conducting metal such as Copper. In this research, chips with TSV are connected by electroplated Sn bump without PR. Then chips with TSV are put together and stacked by the methode of Reflow soldering. The stacking was successfully done and had no noticeable defects. By eliminating PR process, entire process can be reduced and makes it easier to apply on commercial production.

• Journal of Korea Water Resources Association
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• v.51 no.10
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• pp.895-903
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• 2018

There are a large number of weirs installed in rivers of Korea, and these characteristics are not common in other countries. When the flow passes through a structure such as a weir, discontinuous flow occurs. In terms of numerical simulation, it affects the numerical instability due to the balance between the flow term and the source term. In order to solve these problems, many researchers used empirical formulas or numerical scheme simplification. Recently, researches have been conducted to use more accurate numerical scheme. K-River was developed to reflect the characteristics of domestic rivers and calculate the discontinuous flow more accurately. For the verification of K-River, 1) numerical experiment simulations with a bump in the bed, 2) laboratory experiment of hydraulic jump simulation, 3) real river were performed. K-River verified its applicability by simulating results similar to the exact solution and observed value in all simulations.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2006.05a
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• pp.310-313
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• 2006

The present study aims at investigating the effectiveness of a new passive cavity flow control technique, sub-cavity. The characteristics of cavity flow oscillation with the device are compared with those with other control techniques tested previously, including a triangular bump and blowing jet. In the computation, the three-dimensional, unsteady Navier-Stokes equations governing the supersonic cavity flow are solved based on an implicit finite volume scheme spatially and multi-stage Runge-Kutta scheme temporally. Large eddy simulation (LES) is carried out to properly predict the turbulent features of cavity flow. The present results show that the pressure oscillation near the downstream edge dominates overall time-dependent cavity pressure variations, and the amplitude of the pressure oscillation can be reduced in the presence of a sub-cavity.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2005.11a
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• pp.117-120
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• 2005

The present study describes unsteady flow phenomena generated in a supersonic flow passing over a rectangular cavity and suggests a way of control of pressure oscillation, doing harm to overall performance and stable operation of aerodynamic and industrial applications. The three-dimensional, unsteady, compressible Navier-stokes equations are numerically solved based on a fully implicit finite volume scheme and large eddy simulation. The cavity flow are simulated with and without control methods, including a triangular bump and blowing jet installed near the leading edge of the cavity. The results show that the pressure oscillation is attenuated by both control techniques, especially near the trailing edge of cavity.

• Journal of Korean Society of Steel Construction
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• v.9 no.3 s.32
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• pp.309-321
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• 1997

The prediction of the dynamic response of a bridge resulting from passing vehicles across the span is a significant problem in bridge design. In this paper. the static and dynamic experiments are performed to understand the dynamic behavior of an actual two-span steel plate girder bridge. The road surface roughness of the roadway and bridge deck is directly measured by Intelligent Total Station. Numerical scheme to obtain the dynamic responses of the bridges in consideration of measuring road surface roughness and 3-D vehicle model is also presented. The bridge and vehicle are modeled as 3-D bridge and vehicle model, respectively. The main girder and concrete deck are modeled as beam and shell elements, respectively and rigid link is used for the structure between main girder and concrete deck. Bridge-vehicle interaction equations are derived and the impact factors of the responses for different vehicle speeds are calculated and compared with those predicted by several foreign specifications.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.2
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• pp.79-84
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• 2016

A flexible electronic device deformed by external force causes the failure of a semiconductor die. Even without failure, the repeated elastic deformation changes carrier mobility in the channel and increases resistivity in the interconnection, which causes malfunction of the integrated circuits. Therefore it is desirable that a semiconductor die be placed on a neutral line where the mechanical stress is zero. In the present study, we investigated the effects of design factors on the position of neutral line by finite element analysis (FEA), and expected the possible failure behavior in a flexible face-down packaging system assuming flip-chip bonding of a silicon die. The thickness and material of the flexible substrate and the thickness of a silicon die were considered as design factors. The thickness of a flexible substrate was the most important factor for controlling the position of the neutral line. A three-dimensional FEA result showed that the von Mises stress higher than yield stress would be applied to copper bumps between a silicon die and a flexible substrate. Finally, we suggested a designing strategy for reducing the stress of a silicon die and copper bumps of a flexible face-down packaging system.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.4
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• pp.49-53
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• 2011

High-speed Cu filling into a through-silicon-via (TSV) and simplification of bumping process by electroplating for three dimensional stacking of Si dice were investigated. The TSV was prepared on a Si wafer by deep reactive ion etching, and $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to increase the filling rate of Cu into the via, a periodic-pulse-reverse wave current was applied to the Si chip during electroplating. In the bumping process, Sn-3.5Ag bumping was performed on the Cu plugs without lithography process. After electroplating, the cross sections of the vias and appearance of the bumps were observed by using a field emission scanning electron microscope. As a result, voids in the Cu-plugs were produced by via blocking around via opening and at the middle of the via when the vias were plated for 60 min at -9.66 $mA/cm^2$ and -7.71 $mA/cm^2$, respectively. The Cu plug with a void or a defect led to the production of imperfect Sn-Ag bump which was formed on the Cu-plug.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2006.11a
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• pp.363-366
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• 2006

The effectiveness of two passive control techniques for alleviating the pressure oscillation generated in a supersonic cavity flow is investigated numerically. The passive devices suggested in the present research include a triangular bump and a sub-cavity installed near the upstream edge of a rectangular cavity. The supersonic cavity flow characteristics are examined by using the three-dimensional, unsteady Wavier-Stokes computation based on a finite volume scheme. Large eddy simulation (LES) is carried out to properly predict the turbulent features of cavity flow. The results show that the pressure oscillation near the downstream edge dominates overall time-dependent cavity pressure variations. Such an oscillation is attenuated more considerably using the sub-cavity compared with other methods, and a larger sub-cavity leads to better control performance.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2012.11a
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• pp.123-123
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• 2012

최근 연구되고 있는 TSV(Through Silicon Via) 기술은 Si 웨이퍼 상에 직접 전기적 연결 통로인 관통홀을 형성하는 방법으로 칩간 연결거리를 최소화 할 수 있으며, 부피의 감소, 연결부 단축에 따른 빠른 신호 전달을 가능하게 한다. 이러한 TSV 기술은 최근의 초경량화와 고집적화로 대표되는 전자제품의 요구를 만족시킬 수 있는 차세대 실장법으로 기대를 모으고 있다. 한편, 납땜 재료의 주 원료인 주석은 주로 반도체 소자의 제조, 반도체 칩과 기판의 접합 및 플립 칩 (Flip Chip) 제조시의 범프 형성 등 반도체용 배선재료에 널리 사용되고 있다. 최근에는 납의 유해성 때문에 대부분의 전자제품은 무연솔더를 이용하여 제조되고 있지만, 주석을 이용한 반도체 소자가 고밀도화, 고 용량화 및 미세피치(Fine Pitch)화 되고 있기 때문에, 반도체 칩의 근방에 배치된 주석으로부터 많은 알파 방사선이 방출되어 메모리 셀의 정보를 유실시키는 소프트 에러 (Soft Error)가 발생되는 위험이 많아지고 있다. 이로 인해, 반도체 소자 및 납땜 재료의 주 원료인 주석의 고순도화가 요구되고 있으며, 특히 알파 방사선의 방출이 낮은 로우알파솔더 (Low Alpha Solder)가 요구되고 있다. 이에 따라 본 연구는 4인치 실리콘 웨이퍼상에 직경 $60{\mu}m$, 깊이 $120{\mu}m$의 비아홀을 형성하고, 비아 홀 내에 기능 박막증착 및 전해도금을 이용하여 전도성 물질인 Cu를 충전한 후 직경 $80{\mu}m$의 로우알파 Sn-1.0Ag-0.5Cu 솔더를 접합 한 후, 접합부 신뢰성 평가를 수행을 위해 고속 전단시험을 실시하였다. 비아 홀 내 미세구조와 범프의 형상 및 전단시험 후 파괴모드의 분석은 FE-SEM (Field Emission Scanning Electron Microscope)을 이용하여 관찰하였다. 연구 결과 비아의 입구 막힘이나 보이드(Void)와 같은 결함 없이 Cu를 충전하였으며, 고속전단의 경우는 전단 속도가 증가할수록 취성파괴가 증가하는 경향을 보였다. 본 연구를 통하여 전해도금을 이용한 비아 홀 내 Cu의 고속 충전 및 로우알파 솔더 볼의 범프 형성이 가능하였으며, 이로 인한 전자제품의 소프트에러의 감소가 기대된다.