• Journal of the Korean Institute of Intelligent Systems
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• v.23 no.4
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• pp.286-291
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• 2013

In this paper, in-line type flip chip bump 3D inspection equipment, using white light interferometer with large F.O.V., which is aimed to be used in flip chip bump test process is developed. Results of flip chip bump height measurement in many substrates and repeatability test results for the bumps in fixed location of each substrate are shown. Test results from test bench and those from developed flip chip bump 3D inspection equipment are compared and as a result repeatability is improved by reducing the impact of system vibration. A valuation basis for the testing quality of flip chip bump 3D inspection equipment is proposed.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.10
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• pp.865-871
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• 2014

Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

• Journal of computational fluids engineering
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• v.10 no.3 s.30
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• pp.19-26
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• 2005

The purpose of this paper is the study on the characteristics of an inlet system with shock/boundary layer interactions by using various types of bumps which are substituted for the conventional bleeding system in supersonic inlet. in this study a comprehensive numerical analysis has been performed to understand the three-dimensional flow field including shock/boundary layer interaction and growth of turbulent boundary layer that might occur around a three-dimensional bump in a supersonic inlet. The characteristics of boundary layer seen in the current numerical simulations indicate the potential capability of a three-dimensional bump to control shock/boundary layer interaction in supersonic inlets.

• Tribology and Lubricants
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• v.21 no.6
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• pp.256-262
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• 2005

The calculation of bump foil deflection is very important to predict the performance of foil bearings more accurately, because the foil bearings consist of top foil and its elastic foundation usually called bump foil. For the purpose of this, a finite element model considering 3-dimensional structure of the bump foil is developed to calculate the deflection of inter-connected bump. The results obtained from the suggested model are compared and analyzed with those from the previous proposed deflection models. In addition, load capacity of the foil bearings is analyzed by using this model.

• 한국전산유체공학회:학술대회논문집
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• 2005.04a
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• pp.213-218
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• 2005

The purpose of this study is the characteristics of an innovative inlet system with shock/boundary layer interactions by using various types of bumps which are substituted for the conventional bleeding system in supersonic inlet. This study performs a comprehensive numerical effort that be directed at better understanding the three-dimensional flowfield includes shock/boundary layer interaction and growth of turbulent boundary layer that occur around a three-dimensional bump in a supersonic inlet. The characteristics of boundary layer seen in the current numerical simulations indicates the potential capability of the three-dimensional bump to control shock/boundary layer interaction in supersonic inlets.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.10
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• pp.857-863
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• 2014

In this work, we introduce various bonding technologies for 3D package and suggest Insert-Bump bonding (ISB) process newly to stack multi-layer chips successively. Microstructure of Insert-Bump bonding (ISB) specimens is investigated with respect to bonding parameters. Through experiments, we study on find optimal bonding conditions such as bonding temperature and bonding pressure and also evaluate in the case of fluxing and no-fluxing condition. Although no-fluxing bonding process is applied to ISB bonding process, good bonding interface at $270^{\circ}C$ is formed due to the effect of oxide layer breakage.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.11
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• pp.663-674
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• 2003

Bump mapping is a technique that represents the detailed parts of the object surface, such as a perturberance of the skin of a peanut, using the geometry mapping without complex modeling. However, the hardware implementation for bump mapping is considerable, because a large amount of per pixel computation, including the normal vector shading, is required. In this paper, we propose a new bump mapping algorithm using the polar coordinate system and its hardware architecture. Compared with other existing architectures, our approach performs bump mapping effectively by using a new vector rotation method for transformation into the reference space and minimizing illumination calculation. Consequently, our proposed architecture reduces a large amount of computation and hardware requirements.

• Journal of Welding and Joining
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• v.31 no.6
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• pp.77-83
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• 2013

3D packaging technology using TSV (Through Silicon Via)has been studied in the recent years to achieve higher performance, lower power consumption and smaller package size because electrical line is shorter electrical resistivity than any other packaging technology. To stack TSV chips vertically, reliable and robust bonding technology is required because mechanical stress and thermal stress cause fracture during the bonding process. Cu pillar/solder ${\mu}$-bump bonding process is usually to interconnect TSV chips vertically although it has weak shape to mechanical stress and thermal stress. In this study, we suggest Insert-Bump (ISB) bonding process newly to stack TSV chips. Through experiments, we tried to find optimal bonding conditions such as bonding temperature and bonding pressure. After ISB bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.2
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• pp.59-64
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• 2013

In-situ annealing tests of Cu/Ni/Au/Sn-Ag/Cu micro-bump for 3D IC package were performed in an scanning electron microscope chamber at $135-170^{\circ}C$ in order to investigate the growth kinetics of intermetallic compound (IMC). The IMC growth behaviors of both $Cu_3Sn$ and $(Cu,Ni,Au)_6Sn_5$ follow linear relationship with the square root of the annealing time, which could be understood by the dominant diffusion mechanism. Two IMC phases with slightly different compositions, that is, $(Cu,Au^a)_6Sn_5$ and $(Cu,Au^b)_6Sn_5$ formed at Cu/solder interface after bonding and grew with increased annealing time. By the way, $Cu_3Sn$ and $(Cu,Au^b)_6Sn_5$ phases formed at the interfaces between $(Cu,Ni,Au)_6Sn_5$ and Ni/Sn, respectively, and both grew with increased annealing time. The activation energies for $Cu_3Sn$ and $(Cu,Ni,Au)_6Sn_5$ IMC growths during annealing were 0.69 and 0.84 eV, respectively, where Ni layer seems to serve as diffusion barrier for extensive Cu-Sn IMC formation which is expected to contribute to the improvement of electrical reliability of micro-bump.

• Transactions of the Korean Society of Mechanical Engineers
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• v.15 no.1
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• pp.107-119
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• 1991

This dissertation analyzes the running mechanism of flexible and thin tape above rotating head through the experiment. The scope of study is confined to measure the vertical deformation of running tape under hydrodynamic pressure invoking phenomena of elasto-hydrodynamic lubrication between the protruded bump on a rotating cylinder ad the running tape. Experimental system is devised to measure the vertical deflection of the running tape by opto-electronical displacement gauge, which enables to detect microscopic surface deflection of high frequency. Thorough the tests of small specimens of groove and bump, the accuracy and reliability of this experimental method is confirmed and achieved an accuracy within 5%(2.mu.m) error for the microscopic deflection with high frequency. In experimental works, the effects of bump size on flying characteristics of the tape were evaluated and examined. For the vertical deformation of the running tape. the numerical results and its trend agree qualitatively with the experimental ones.