• Journal of KIISE:Computing Practices and Letters
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• v.15 no.1
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• pp.1-13
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• 2009

Flash memory is widely used as a storage medium of mobile devices such as MP3 players, cellular phones and digital cameras due to its tiny size, low power consumption and shock resistant characteristics. Currently, there are many studies to replace HDD with flash memory because of its numerous strong points. To use flash memory as a storage medium, FTL(Flash Translation Layer) is required since flash memory has erase-before-write constraints and sizes of read/write unit and erase unit are different from each other. Recently, new type of flash memory called "large block flash memory" is introduced. The large block flash memory has different physical structure and characteristics from previous flash memory. So existing FTLs are not efficiently operated on large block flash memory. In this paper, we propose an efficient FTL for large block flash memory based on FAST(Fully Associative Sector Translation) scheme and page-level mapping on data blocks.

• Smart Media Journal
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• v.8 no.1
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• pp.19-26
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• 2019

At the opening ceremony of 2018 Winter Olympics in PyeongChang, an unknown cyber-attack occurred. The malicious code used in the attack is based on in-memory malware, which differs from other malicious code in its concealed location and is spreading rapidly to be found in more than 140 banks, telecommunications and government agencies. In-memory malware accounts for more than 15% of all malicious codes, and it does not store its own information in a non-volatile storage device such as a disk but resides in a RAM, a volatile storage device and penetrates into well-known processes (explorer.exe, iexplore.exe, javaw.exe). Such characteristics make it difficult to analyze it. The most recently released in-memory malicious code bypasses the endpoint protection and detection tools and hides from the user recognition. In this paper, we propose a method to efficiently extract the payload by unpacking injection through IDA Pro debugger for Dorkbot and Erger, which are in-memory malicious codes.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.1
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• pp.65-70
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• 2022

As fast storage has become popular, the memory management system designed for hard disks needs to be reconsidered. In this paper, we observe that memory access latency is sensitive to the page size when fast storage is adopted. We find the reason from the TLB miss rate, which has the increased impact on the memory access latency in comparison with the page fault rate, and there is trade-off between the TLB miss rate and the page fault rate as the page size is varied. To handle such situations, we model the page fault rate and the TLB miss rate accurately as a function of the page size. Specifically, we show that the power fit and the exponential fit with two terms are appropriate for fitting the TLB miss rate and the page fault rate, respectively. We validate the effectiveness of our model by comparing the estimated values from the model and real values.

• KNOM Review
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• v.22 no.3
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• pp.1-12
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• 2019

Recently, researching using big data and AI has emerged as a major issue in the ICT field. But, the size of big data for research is growing exponentially. In addition, users of data transmission of existing network method suggest that the problem the time taken to send and receive big data is slower than the time to copy and send the hard disk. Accordingly, researchers require dynamic and flexible network technology that can transmit data at high speed and accommodate various network structures. SDN/NFV technologies can be programming a network to provide a network suitable for the needs of users. It can easily solve the network's flexibility and security problems. Also, the problem with performing AI is that centralized data processing cannot guarantee real-time, and network delay occur when traffic increases. In order to solve this problem, the edge-computing technology, should be used which has moved away from the centralized method. In this paper, we investigate the concept and research trend of SDN, NFV, and edge-computing technologies, and analyze the trends of data central network technologies used by combining these three technologies.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.703-703
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• 2013

다이아몬드상 탄소 박막(Diamond-like carbon, DLC) 박막은 낮은 마찰 계수, 높은 내마모성, 화학적 안정성, 적외선 영역에서의 높은 투과율 등의 장점을 바탕으로 MEMS (Micro-Electro Mechanical System) 소자와 MMAs (Moving Mechanical Assemblies)의 고체윤활코팅, 마그네틱 미디어와 하드디스크의 슬라이딩 표면 등 다양한 분야에 코팅소재로써 응용되어왔다 [1,2]. 현재 전기철도용 집전판은 마찰이 적고 전도성을 지니는 카본 소재로 구성되어 있다. 그러나 그 마모 비율이 너무 심하여 이를 개선할 수 있는 방안으로 고경도 저마찰력을 지니는 DLC 박막을 코팅 소재로써 제안하고자 한다. 그러나 기존에 DLC 박막은 절연특성이 매우 우수하기 때문에 기존에 전도성을 지니는 카본 집전판에 적용하기에는 어려움이 따른다. 따라서 DLC 박막 내에 실리콘(Si) 또는 금속(Metal)을 첨가시키거나, 금속 중간층을 포함시켜 전기적으로 전도특성을 향상시키는 방안이 제시되고 있으며, 본 연구에서는 DLC 박막과 유사하게 우수한 경도특성을 지니고, 낮은 마찰계수등을 지니는 비정질 탄소박막을 연구하여 카본 집전판에 코팅하고자하며, 특히 비정질 탄소박막에 금속 Ti를 도핑하여 집전판과의 접착력과 전기적 전도 특성을 향상시키고자 한다. Ti가 도핑된 탄소박막(TiC) 박막은 비대칭 마그네트론 스퍼터링(unbalanced magnetron sputtering; UBMS) 시스템을 이용하여 제작하였으며, 스퍼터링 조건 중 기판에 인가되어지는 기판온도에 따라 변화되어지는 TiC 박막의 트라이볼로지(Tribology) 특성을 고찰하고자 하였다. 증착시 기판온도의 증가는 TiC 박막의 경도, 마찰계수 특성등 트라이볼로지 특성을 향상시켰으며, 전기적 전도 특성을 향상시켰다. 이러한 결과는 스퍼터링 방법에 의해 증착되어진 TiC 박막내에 존재하는 sp2 결합과 관계가 있음을 확인할 수 있으며, 트라이 볼로지 특성은 TiC 박막내에 sp2 탄소결합의 비율 증가와 관련되어졌다. 특히 sp2 탄소결합은 TiC 박막 증착시 증가된 기판온도와 밀접한 관계가 있으며 기판온도의 증가에 따라 나노결정 클러스터의 크기와 수의 변화와 밀접한 관계가 있음을 확인하였다. 결국 기판온도는 TiC 박막의 트라이볼로지 특성을 향상시켰으며, 전기적 특성 또한 향상시켜 전기철도 집전판에 응용을 위한 소재로 평가할 수 있다.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.1
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• pp.14-20
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• 2009

Recently, NAND flash memory is used not only for portable devices, but also for personal computers and server computers. Buffer cache replacement policies for the hard disks such as LRU and LFU are not good for NAND flash memories because they do not consider about the characteristics of NAND flash memory. CFLRU and its variants, CFLRU/C, CFLRU/E and DL-CFLRU/E(CFLRUs) are the buffer cache replacement policies considered about the characteristics of NAND flash memories, but their performances are not better than those of LRD. In this paper, we propose a new buffer cache replacement policy for NAND flash memory. Which is based on LFU and is taking into account the characteristics of NAND flash memory. And we estimate the performance of hit ratio and flush operation numbers. The proposed policy shows better hit ratio and the number of flush operation than any other policies.

• Journal of the Korea Society of Computer and Information
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• v.16 no.2
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• pp.1-8
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• 2011

NAND type Flash memory has performing much researches for a hard disk substitution due to its low power consumption, cheap prices and a large storage. Especially, the NAND type flash memory is using general buffer systems of a cache memory for improving overall system performance, but this has shown a tendency to emphasize in terms of data. So, our research is to design a high performance instruction NAND type flash memory structure by using a buffer system. The proposed buffer system in a NAND flash memory consists of two parts, i.e., a fully associative temporal buffer for branch instruction and a fully associative spatial buffer for spatial locality. The spatial buffer with a large fetching size turns out to be effective serial instructions, and the temporal buffer with a small fetching size can achieve effective branch instructions. According to the simulation results, we can reduce average miss ratios by around 77% and the average memory access time can achieve a similar performance compared with the 2-way, victim and fully associative buffer with two or four sizes.

• Journal of the Korea Society of Computer and Information
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• v.20 no.4
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• pp.1-10
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• 2015

NAND flash systems require deletion operation and do not support in-place update, so the storage systems should use Flash Translation Layer (FTL). However, there are a lot of memory consumptions using mapping table in the FTL, so recently, many studies have been proposed to resolve mapping table overhead. These studies try to solve update propagation problem in the nand flash system which does not use mapping table. In this paper, we present a novel index structure, called CL-Tree(Cache List Tree), to solve the update propagation problem. The proposed index structure reduces write operations which occur for an update propagation, and it has a good performance for search operation because it uses multi-list structure. In experimental evaluation, we show that our scheme yields about 173% and 179% improvement in insertion speed and search speed, respectively, compared to traditional B+tree and other works.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.181-181
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• 2008

DLC (Diamond-like Carbon) 박막은 높은 내마모성과 낮은 마찰 계수, 화학적 안정성 및 적외선 영역에서의 높은 투과율과 낮은 광 반사도, 높은 전기저항과 낮은 유전율, 전계방출특성 등 여러 가지 장점을 가진 물질이다[1]. 최근에는 DLC 박막의 여러 장점들과 산과 염기 유기용매에 대한 화학적 안정성으로 인하여 인조관절에서 인공심장의 판막에 이르기까지 의공학 관련 부품소재로 응용되고 있으며 내구성과 안정성에 있어서 탁월한 성능을 보여주고 있다. 또한 DLC 박막의 높은 경도와 낮은 마찰 계수, 부드러운 박막 표면 (수nm의 RMS 거칠기)의 장점을 살려 마그네틱 미디어와 하드디스크의 슬라이딩 표면에 사용되어지고, MEMS (Micro-Electro Mechanical System) 소자와 MMAs (Moving Mechanical Assemblies)의 고체윤활코팅으로 활용하여 미세기계의 내구성과 성능 향상을 도모할 수 있다. 이와 같이 DLC 박막은 다양한 분야에 응용되고 있으며, 박막이 지닌 여러 가지 장점들로 인하여 더 많은 분야에 응용될 가능성을 지닌 물질이다. 그러나 수 ${\mu}m$이상의 두께에서 박막이 높은 잔류응력 (residual stress)을 가지고, 열에 취약하여 이의 개선에 관한 연구들이 진행되어 지고 있다 [2]. 따라서 사용되는 목적에 따라 용도에 맞는 양질의 DLC 박막을 합성하기 위해선 합성 장치의 개발과 다양한 실험을 통한 최적의 합성조건 도출 등의 노력이 요구된다. 또한 DLC 박막 합성시의 여러 가지 증착 방법에 따른 박막 물성에 대한 재현성 확보 및 박막 증착에 관한 명확한 메커니즘 규명이 아직까지는 불분명하여 이에 관한 연구가 시급하다. 따라서 본 연구에서는 MEMS 소자와 MMAs의 고체윤활코팅으로 사용가능한 DLC 박막을 RF PECVD (Plasma Enhanced Vapor Deposition) 방식으로 합성하고 후열처리 온도에 따른 DLC 박막의 마찰계수 변화를 박막에 훼손을 주지 않는 FFM (Friction Force Microscopy) 방식을 사용하여 분석하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.1
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• pp.109-114
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• 2014

Recently the operating system share of linux on embedded system is increasing. The embedded systems on linux environment, commonly equip a file system as mini hard disk or flash memory to keep data. The types of the file system of the system are various according to it's operating system. Anyway, the more embedded system depends on the file system, the selection of the type of the file system effects more on the performance of the system. This thesis performs the performance benchmark of a FAT and Ext file systems which are most popular in embedded system. As the result, it is discussed that what file system is better at which case. These results will be a index at the selection of flash file system of the embedded systems on linux environment.