• Journal of the Korea Society of Computer and Information
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• v.14 no.3
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• pp.217-226
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• 2009

In this paper, we analyze process of implementing and successful enabler of Postal Logistics Integrated Information Systems(PostNet) through a case study on Korea Post. PostNet was integrated by considering contingently organizational integration (organizational structure redesign), strategical integration (business process reengineering), and technical integration(data integration, application integration, and integrated platform implementation). And also integration was implemented for supporting three aspects. PostNet has implication for advanced integration with business mission and operational efficiency by comparing integration with physical level and hardware level. Korea Post has the biggest logistics network, organization, and service in logistics industry area. The results of this paper will suggest theoretical framework for the future information system integration, and will be utilized as a practical guideline for the information system integration.

• Journal of IKEEE
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• v.27 no.4
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• pp.624-629
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• 2023

Estimation of signal parameters via rotational invariance techniques (ESPRIT) is an algorithm that estimates the angle of a signal arriving at an array antenna using the shift invariance property of an array antenna. ESPRIT offers the good trade-off between performance and complexity. However, the ESPRIT algorithm still requires high-complexity operations such as covariance matrix and eigenvalue decomposition, so implementation with a hardware processor is essential to estimate the angle of arrival in real time. In addition, ESPRIT processors should have high performance. The performance is related to the number of antennas, and the number of antennas required for each application are different. Therefore, we proposed an ESPRIT processor that provides 2 to 8 variable antenna configurations to meet the performance and complexity requirements according to the applied field. The proposed ESPRIT processor was designed using the Verilog-HDL and implemented on a field programmable gate array (FPGA).

• Proceedings of the Korea Information Processing Society Conference
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• 2008.11a
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• pp.882-884
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• 2008

통상 하드웨어 캐시의 크기보다 수십에서 수백배 큰 크기의 데이타를 랜덤하게 접근하는 경우 낮은 메모리 접근 지역성(locality)에 기인하여 캐시 메모리 성능이 급격히 저하되는 문제를 야기한다. 예를 들면, 현재 보편적으로 사용되고 있는 차량용 General Positioning System (GPS) 프로그램의 경우 최대 32개의 위성으로부터 데이터를 받아 수신단의 위치를 계산하는 부분이 핵심 모듈중의 하나 이며, 이는 전체 성능의 50% 이상을 차지한다. 이러한 모듈에서는 위성 신호를 실시간으로 받아 버퍼 메모리에 저장하며, 이때 필요한 데이터가 순차적으로 저장되지 못하기 때문에 랜덤하게 데이터를 읽어 사용하게 된다. 결과적으로 낮은 지역성에 기인하여 실시간 (realtime)안에 데이터 처리를 하기 어려운 문제에 직면하게 된다. 통상의 통신 응용의 알고리즘 상에 내재된(inherited) 낮은 메모리 접근 지역성을 개선하는 것은 알고리즘 상에서의 접근을 요구한다. 이는 높은 비용이 필요함으로 본 연구에서는 사용되는 데이터 구조를 변환하여 지역성을 높이는 방향으로 접근하였다. 결과적으로 핵심 모듈에서 2배, 전체 시스템 성능에서 14%를 개선할 수 있었다.

• The Journal of the Convergence on Culture Technology
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• v.10 no.2
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• pp.525-530
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• 2024

The need for an environmental monitoring system that obtains and provides environmental information in real time is increasing. In particular, in the case of water quality management in public waters, regular management must be conducted through manual and automatic measurement by law, and air pollution also requires regular measurement and management to reduce fine dust and exhaust gas in connection with the realization of carbon neutrality. In this study, we implemented a system that can measure and monitor water pollution and air pollution information in real time. A hovercraft capable of moving on land and water simultaneously was used as a measurement tool. Water quality measurement and air pollution measurement sensors were installed on the hovercraft body, and a communication module was installed to transmit the information to the monitoring system in real time. The structure of a hovercraft for environmental measurement was designed, and a LoRa module capable of low-power, long-distance communication was applied as a real-time information transmission communication module. The operational performance of the proposed system was confirmed through actual hardware implementation.

• Journal of IKEEE
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• v.28 no.1
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• pp.53-64
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• 2024

With the advancement of NLP(Natural Language Processing) models, conversational AI such as ChatGPT is becoming increasingly popular. To enhance processing speed and reduce power consumption, it is important to implement the Transformer algorithm, which forms the basis of the latest natural language processing models, in hardware. In particular, the multi-head attention and feed-forward network, which analyze the relationships between different words in a sentence through matrix multiplication, are the most computationally intensive core algorithms in the Transformer. In this paper, we propose a new variable systolic array based on the number of input words to enhance matrix multiplication speed. Quantization maintains Transformer accuracy, boosting memory efficiency and speed. For evaluation purposes, this paper verifies the clock cycles required in multi-head attention and feed-forward network and compares the performance with other multipliers.

• Land and Housing Review
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• v.15 no.1
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• pp.99-115
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• 2024

This study aims to investigate Marseille's Euromméditerranée project and provide policy implications for revitalizing domestic urban regeneration projects. First, we identify Euroméditerranée as a pivotal urban regeneration effort, executed by EPAEM-an organization fostering governance-driven project advancement through collaboration and investment from both central and local governments. This endeavor has significantly contributed to revitalizing Marseille, enriching the quality of life for its residents. Second, this urban regeneration project has the following notable features: consolidated approach with combination of full redevelopment and rehabilitation, integrated regeneration covering hardware-like physical regeneration and software-like economic, cultural, and environmental regeneration; government-type urban regeneration project structure. Finally, we suggest that policymakers should consider the economic scale in urban regeneration projects, national-level government organizations, and efficient public-private partnerships.

• Journal of Korea Society of Industrial Information Systems
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• v.29 no.3
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• pp.23-40
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• 2024

Hardware attacks involve physical reverse engineering efforts to steal sensitive information, such as encryption keys and circuit designs. Encryption and obfuscation are representative countermeasures, but they are nullified if adversaries manage to find the key. To address this issue, we propose e-Cryptex, which utilizes a Physically Unclonable Function (PUF) as an anti-tampering shield. PUF acts as a random number generator and relies on unique physical variants that cannot be replicated or restored to enhance anti-tampering mechanisms. e-Cryptex uses PUF as a shield to protect the system's structure and generate the key. Tampering with the shield will result in the destruction of the key. This paper demonstrates that e-Cryptex meets PUF security requirements and is effective in detecting of tampering attempts that pierce or completely destroy the shield. Each board consistently generates the same key under normal conditions, while also showing key uniqueness across different boards.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.253-263
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• 2013

Frequency Scanning Interferometry(FSI) system, one of the most promising optical surface measurement techniques, generally results in superior optical performance comparing with other 3-dimensional measuring methods as its hardware structure is fixed in operation and only the light frequency is scanned in a specific spectral band without vertical scanning of the target surface or the objective lens. FSI system collects a set of images of interference fringe by changing the frequency of light source. After that, it transforms intensity data of acquired image into frequency information, and calculates the height profile of target objects with the help of frequency analysis based on Fast Fourier Transform(FFT). However, it still suffers from optical noise on target surfaces and relatively long processing time due to the number of images acquired in frequency scanning phase. 1) a Polarization-based Frequency Scanning Interferometry(PFSI) is proposed for optical noise robustness. It consists of tunable laser for light source, ${\lambda}/4$ plate in front of reference mirror, ${\lambda}/4$ plate in front of target object, polarizing beam splitter, polarizer in front of image sensor, polarizer in front of the fiber coupled light source, ${\lambda}/2$ plate between PBS and polarizer of the light source. Using the proposed system, we can solve the problem of fringe image with low contrast by using polarization technique. Also, we can control light distribution of object beam and reference beam. 2) the signal processing acceleration method is proposed for PFSI, based on parallel processing architecture, which consists of parallel processing hardware and software such as Graphic Processing Unit(GPU) and Compute Unified Device Architecture(CUDA). As a result, the processing time reaches into tact time level of real-time processing. Finally, the proposed system is evaluated in terms of accuracy and processing speed through a series of experiment and the obtained results show the effectiveness of the proposed system and method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.2A
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• pp.188-194
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• 2007

In order to become ubiquitous world, the compatibility of wireless machines has become the significant characteristic of a communication terminal. Thus, SDR is the most necessary technology and standard. However, among the environment which has different communication protocol, it's difficult to make a terminal with only hardware using ASIC or SoC. This paper suggests the processor that can accelerate several communication protocol. It can be connected with main-processor, and it is specialized PHY layer of network The C-program that is modeled with the wireless protocol IEEE802.11a and IEEE802.11b which are based on widely used modulation way; OFDM and CDM is compiled with ARM cross compiler and done simulation and profiling with Simplescalar-Arm version. The result of profiling, most operations were Viterbi operations and complex floating point operations. According to this result we suggested a co-processor which can accelerate Viterbi operations and complex floating point operations and added instructions. These instructions are simulated with Simplescalar-Arm version. The result of this simulation, comparing with computing only one ARM core, the operations of Viterbi improved as fast as 4.5 times. And the operations of complex floating point improved as fast as twice. The operations of IEEE802.11a are 3 times faster, and the operations of IEEE802.11b are 1.5 times faster.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.40 no.1
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• pp.9-16
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• 2016

A position control system composed of the PMLSM(Permanent Magnet Linear Synchronous Motor), unlike conventional linear permanent magnet synchronous motor is fixed to the permanent magnet moving coil rails (permanent magnet = stator, coil = mover), the coil is fixed, moving the permanent magnet, we propose a position control system (permanent magnet = mover, coil = stator) structure. Position is measured not using conventional encoder or resolver but by adopting vector control method using 2 hall sensors generating rectangular signal. This method estimate the velocity and position of mover by using the quadruple of two hall sensor signal instead of encoder signal. Vector control of PMLSM using 2 hall sensor generating rectangular wave is proved to control the system stable and efficiently through simulation. Also hardware experiment reveals that the position control performance is measured within the range of $30{\sim}50{\mu}m$ in the accuracy of $10{\sim}20{\mu}m$, which is improved twice to the conventional method. The proposed method exhibits its economical efficiency and practical usefulness. The vector control technique using two hall sensors can be installed in narrow place, accordingly it can be implemented on the system where the conventional encoder or resolver cannot operate.