• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.24 no.12
• /
• pp.1688-1696
• /
• 2020

The paradigm of Internet-of-things(IoT) systems is changing from a cloud-based system to an edge-based system to solve delays caused by network congestion, server overload and security issues due to data transmission. However, edge-based IoT systems have fatal weaknesses such as lack of performance and flexibility due to various limitations. To improve performance, application-specific hardware can be implemented in the edge device, but performance cannot be improved except for specific applications due to a fixed function. This paper introduces a edge-centric metamorphic IoT(mIoT) platform that can use a variety of hardware through on-demand partial reconfiguration despite the limited hardware resources of the edge device, so we can increase the performance and flexibility of the edge device. According to the experimental results, the edge-centric mIoT platform that executes the reconfiguration algorithm at the edge was able to reduce the number of server accesses by up to 82.2% compared to previous studies in which the reconfiguration algorithm was executed on the server.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.25 no.6
• /
• pp.813-818
• /
• 2021

This paper proposes an optimized hardware implementation method for existing CIE1931 color gamut control algorithm. Among the post-processing methods of dehazing algorithms, existing algorithm with relatively low computations have the disadvantage of consuming many hardware resources by calculating large bits using Split multiplier in the computation process. The proposed algorithm achieves computational reduction and hardware miniaturization by reducing the predefined two matrix multiplication operations of the existing algorithm to one. And by optimizing the Split multiplier computation, it is implemented more efficient hardware to mount. The hardware was designed in the Verilog HDL language, and the results of logical synthesis using the Xilinx Vivado program were compared to verify real-time processing performance in 4K environments. Furthermore, this paper verifies the performance of the proposed hardware with mounting results on two FPGAs.

• Proceedings of the Korean Information Science Society Conference
• /
• 2005.11a
• /
• pp.511-513
• /
• 2005

하드웨어의 성능향상으로 임베디드 통신 소프트웨어의 복잡도가 크게 증가되고, 이에 따르는 추가적인 개발 비용이 발생하고 있다. 개발자들은 임베디드 통신 소프트웨어의 복잡도를 해결하는데 필요한 소프트웨어 도구와 기술을 필요로 하고 있다. 본 논문에서는 임베디드 통신 소프트웨어 개발에 효과적인 SDL(Specification Description Language) 기반의 통합 개발도구인 SDT(SDL Design Tool)를 사용하여 소프트웨어를 개발하는 절차에 대하여 기술한다. 그리고 통신 소프트웨어인 ITU-T V.76 프로토콜에 개발 절차를 적용하여, SDT를 사용한 개발 절차와 일반적인 임베디드 통신 소프트웨어 개발 절차를 비교, 분석한다. 그 결과, SDT를 사용한 개발 절차가 개발 효율성과 유지보수 효율성에서 더 좋은 성능을 보였다.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.24 no.4
• /
• pp.593-605
• /
• 2014

In this paper, we propose the efficient HW/SW co-design method of light-weight cryptography such as HIGHT, PRESENT and PRINTcipher using GEZEL. At first the symmetric cryptographic algorithms were designed using the GEZEL language which is efficiently used for HW/SW co-design. And for the improvement of performance the HW optimization theory such as unfolding, retiming and so forth were adapted to the cryptographic HW module conducted by FSMD. Also, the operation modes of those algorithms were implemented using C language in 8051 microprocessor, it can be compatible to various platforms. For providing reliable communication between HW/SW and preventing the time delay the improved handshake protocol was chosen for enhancing the performance of the connection between HW/SW. The improved protocol can process the communication-core and cryptography-core on the HW in parallel so that the messages can be transmitted to SW after HW operation and received from SW during encryption operation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2013.05a
• /
• pp.975-977
• /
• 2013

Arduino is for design based on open source prototyping platform, artist, designer, hobby activists, etc, i has been designed for all those who are interested in the environment construct. Arduino adventage you can easily create applications hardware, without deep knowledge about the hardware. Configuration of arduino using AVR microcontroller ATmage 168, software to action arduino using arduino program, MATLAB, Processing. Arduino is open source base, you can hardware production directly and using shield additionally, the arduino can be combined. Processing iis open source. You can 2D, 3D, PDF output, using P3D and OpenGL graphics. Also you can check by running a stand-alone application. Through a combination of Arduino, library support, such as sound, video, and computer vision can be expanded, this program is the Android phone and iPhone programming. In this paper, sortware was used for Processing, hardware was used for arduino MegaADK board, After making easy 2axis game, using the software and hardware verification.

• The Transactions of the Korea Information Processing Society
• /
• v.6 no.7
• /
• pp.1749-1755
• /
• 1999

The MPEG is the standard of coding moving pictures, and MPEG-1 and MPEG-2 are widely in use. And as the performance of CPU has improved, it is now possible to implement MPEG-1 in software only. This paper introduces the techniques of developing MPEG-1 playback system in software without using hardware on Windows 95 operating system. The implemented MPEG-1 playback system shows an acceptable performance.

• Journal of Advanced Navigation Technology
• /
• v.15 no.2
• /
• pp.298-306
• /
• 2011

In this paper, the RUNCODE encoder hardware IP was designed and implemented for symbol ID code length encoding, which is one of major modules of JBIG2 encoder for FAX. ImpulseC Codeveloper and Xilinx ISE/EDK program are used for the hardware generation and synthesis of VHDL code. The synthesized hardware was downloaded to Virtex-4 FX60 FPGA on ML410 development board. The synthesized hardware utilizes 13% of total slice of FPGA. Using Active-HDL tool, the hardware was verified showing normal operation. Compared with the software operating using Microblaze cpu on ML410 board, the synthesized hardware was better in operation time. The improvement ratio of operation time between the synthesized hardware and software showed about 40 times faster than software only operation. The synthesized H/W and S/W module cooperated to succeed in compressing the CCITT standard document.

• Proceedings of the Korean Information Science Society Conference
• /
• 2005.07a
• /
• pp.805-807
• /
• 2005

H.264/AVC의 프레임내 예측기법은 현 매크로블록의 이웃픽셀들로부터 예측값을 추출함으로써 인트라 픽처의 압축률을 높이는데 크게 기여했다. 그러나 모든 매크로블록에 대해 총 17가지의 후보 모드를 검사해야 하기 때문에, 전체 부호화기의 복잡도를 상당히 상승시키는 요인이기도 하다. 본 논문에서는 이 문제를 해결하기 위해, 기존의 움직임 추정 전용 하드웨어로 주로 사용되는 1차원 시스톨릭 어레이 구조에 부가적인 하드웨어를 장착하여, 움직임 추정뿐만 아니라 프레임 내 예측까지 가능한 하드웨어 구조를 제안한다. 병렬적으로 끊김이 없는 수행을 위해 프레임내 예측 알고리즘을 약간 수정했으나, 이것은 화질이나 비트스트림 크기에 영향을 거의 미치지 않는다. 제안된 구조는 연산에 대한 명령어 개수로 비교할 때, ARM 기반 시스템에서 얻을 수 있는 성능의 10배에서 40배에 달하는 높은 성능을 보여준다.

• Proceedings of the Korea Multimedia Society Conference
• /
• 2003.11b
• /
• pp.630-633
• /
• 2003

최근에 조명의 표현 성능을 향상시키기 위한 몇 가지 기술이 발전되었다. Homomorphic Factorization(HF) 기반의 새로운 기술은 BRDF에 근사화 하지는 않는다. 그러나 전체조명 장면에서의 isotropic BRDF의 full lighting computation을 대신할 수 있다. 이 방법으로 현재 그래픽 하드웨어의 일반적인 성능을 이용하여 최소 두개의 2D Texture로 Isotropic illumination 환경을 시뮬레이션 할 수 있었다.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
• /
• 2005.05a
• /
• pp.151-156
• /
• 2005

본 논문에서는 비선형 역학 시스템에서 복합적 지능 알고리즘을 이용하여 시스템의 제어 성능을 개선시키는 방법에 대하여 논의하였다. 기존의 비선형 제어를 위한 뉴럴 네트워크 및 유전자 알고리즘은 학습이 종료된 후에 고정된 상태에서는 훌륭한 제어를 보여주지만, 환경 변화와 같은 변이 인자가 발생되면 제어가 제대로 되지 않으며 재학습을 해야만 한다. 이때 재학습에 드는 시간이 많이 걸리는 문제점이 있다. 제안하는 시스템에서는 변이 인자가 발생되었을 때의 상황을 항원으로 하는 면역 시스템을 기존 제어시스템에 추가하여 사용함으로써 보다 안정적이며 빠른 제어 수행이 가능함을 보일 것이다. 또한 기존에 하드웨어로 구성하기 어려웠던 유전 알고리즘을 하드웨어로 구성하기 쉽도록 유전 인자를 메모리 주소로 하는 알고리즘을 만들게 되었다.