• Journal of KIISE:Computing Practices and Letters
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• v.16 no.6
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• pp.673-677
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• 2010

Recently, NAND flash memory has been widely used in embedded systems, personal computers, and server systems because of its attractive features, such as non-volatility, fast access speed, shock resistance, and low power consumption. Due to its hardware characteristics, specifically its 'erase-before-write' feature, Flash Translation Layer is required for using flash memory like hard disk drive. Many FTL schemes have been proposed, but conventional FTL schemes have problems such as block thrashing and block associativity problem. The KAST scheme tried to solve these problems by limiting the number of associations between data block and log block to K. But it has also block thrashing problem in random access I/O pattern. In this paper, we proposed a new FTL scheme, UDA-LBAST. Like KAST, the proposed scheme also limits the log block association, but does not limit data block association. So we could minimize the cost of merge operations, and reduce merge costs by using a new block reclaim scheme, log block garbage collection.

• Proceedings of the Korean Information Science Society Conference
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• 2011.06b
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• pp.434-437
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• 2011

낸드 플래시 메모리는 하드 디스크와는 다른 여러가지 특성 때문에 논리 주소를 불러 주소를 변환해 주는 주소 변환 계층(FTL)이 필요하다. 최근에 고성능의 저장 장치를 제공하기 위해서 페이지 수준의 주소 변환 기법이 많이 사용되고 있는 데, 이 기법은 매핑 정보가 너무 커서 메모리에서 매핑 정보를 관리하기에는 힘들다는 문제와 데이터의 접근 지역성을 잘 활용하지 못하는 문제가 있다. 본 논문에서는 스토리지의 주소 공간을 유닛이라는 단위로 분리하여 페이지 수준의 주소변환을 사용함으로써 매핑 정보를 크기를 줄이고 또한 접근 지역성을 활용하여 가비지 컬렉션 오버해드를 줄이는 유닛 레벨 주소 변환 기법을 제시한다. 실험결과 제시한 기법은 페이지 매핑 기법보다 랜덤 접근 패턴에서 가비지 컬렉션 오버해드를 40% 감소시켰으며 매핑 데이터 량도 38% 감소시켰다.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.1
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• pp.1-13
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• 2009

Flash memory is widely used as a storage medium of mobile devices such as MP3 players, cellular phones and digital cameras due to its tiny size, low power consumption and shock resistant characteristics. Currently, there are many studies to replace HDD with flash memory because of its numerous strong points. To use flash memory as a storage medium, FTL(Flash Translation Layer) is required since flash memory has erase-before-write constraints and sizes of read/write unit and erase unit are different from each other. Recently, new type of flash memory called "large block flash memory" is introduced. The large block flash memory has different physical structure and characteristics from previous flash memory. So existing FTLs are not efficiently operated on large block flash memory. In this paper, we propose an efficient FTL for large block flash memory based on FAST(Fully Associative Sector Translation) scheme and page-level mapping on data blocks.

• Journal of KIISE
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• v.44 no.11
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• pp.1130-1137
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• 2017

The multi-leveling technique that stores multiple bits in a single memory cell has significantly improved the density of NAND flash memory along with shrinking processes. However, because of the side effects of the multi-leveling technique, the average write performance of MLC NAND flash memory is degraded more than twice that of SLC NAND flash memory. In this paper, we introduce existing cross-layer optimization techniques proposed to improve the performance of MLC NAND flash-based storages, and propose a new integration technique that overcomes the limitations of existing techniques by exploiting their complementarity. By fully exploiting the performance asymmetry in MLC NAND flash devices at the flash translation layer, the proposed technique can handle many write requests with the performance of SLC NAND flash devices, thus significantly improving the performance of NAND flash-based storages. Experimental results show that the proposed technique improves performance 39% on average over individual techniques.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.3
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• pp.336-340
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• 2010

Flash storages are prevalent as portable storage in computing systems. When we consider the detachability of Flash storage devices, data integrity becomes an important issue. To assure extreme data integrity, file systems synchronously write all file data to storage accompanying hot write references. In this study, we concentrate on the effect of hot write references on Flash storage, and we consider the effect of absorbing the hot write references via nonvolatile write cache on the performance of the FTL schemes in Flash storage. In 80 doing, we quantify the performance of typical FTL schemes for workloads that contain hot write references through a wide range of experiments on a real system environment. Through the results, we conclude that the impact of the underlying FTL schemes on the performance of Flash storage is dramatically reduced by absorbing the hot write references via nonvolatile write cache.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.773-774
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• 2009

최근 낸드 플래시 메모리가 차세대 저장장치로 부상하면서 수십 년간 DBMS의 저장장치였던 하드디스크의 대안으로 주목 받고 있다. 낸드 플래시 메모리는 하드 디스크와 인터페이스가 다르기 때문에 일반적으로 플래시 변환 계층을 사용하여 기존 소프트웨어와 호환성을 유지한다. 하지만 플래시 변환 계층은 소량의 랜덤 쓰기가 빈번한 DBMS 환경에서 비효율적인 방식이다. 이러한 문제점을 극복하기 위해 DBMS의 특성을 고려한 In-Page Logging(IPL) 기법이 제안되었다. IPL 기법은 우수한 성능과 복구의 용이성 외에도 DBMS 구조를 크게 변경하지 않고 구현이 가능한 것이 장점이다. 본 논문의 목적은 IPL 기법을 활용하여 상용 DBMS에서 최소한의 변화만으로 낸드 플래시 메모리를 저장 장치로 사용 할 수 있음을 증명하는 것이다. 이를 위해 Berkeley DBMS에 IPL 기법을 구현하며 성능 평가를 통해 IPL 기법이 상용 DBMS 에서도 우수한 성능을 보이는 것을 확인한다.

• The KIPS Transactions:PartD
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• v.17D no.6
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• pp.383-394
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• 2010

Flash memory based SSDs are currently being considered as a promising candidate for replacing hard disks due to several superior features such as shorter access time, lower power consumption and better shock resistance. However, SSDs have different characteristics from hard disk such as difference of unit and time for read, write and erase operation and impossibility for over-writing. Because of these reasons, SSDs have disadvantages on hard disk based systems, so FTL(Flash Translation Layer) is designed to increase SSDs' efficiency. In this paper, we propose an advanced logical address mapping method for increasing SSDs' performance, which is named HAMM(Hybrid Address Mapping Method). HAMM addresses drawbacks of previous block-mapping method and super-block-mapping method and takes advantages of them. We experimented our method on our own SSDs simulator. In the experiments, we confirmed that HAMM uses storage area more efficiently than super-block-mapping method, given the same buffer size. In addition, HAMM used smaller memory than block-mapping method to construct mapping table, demonstrating almost same performance.

• The KIPS Transactions:PartA
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• v.12A no.7 s.97
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• pp.621-626
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• 2005

Recently, flash memory is widely used in various embedded applications since it has many advantages in terms of non-volatility, fast access speed, shock resistance, and low power consumption. However, it requires a software layer called FTL(Flash Translation Layer) due to its hardware characteristics. We present a new FTL algorithm named LSTAFF(Large State Transition Applied Fast flash Translation Layer) which is designed for large block flash memory The presented LSTAFF is adjusted to flash memory with pages which are larger than operating system data sector sizes and we provide performance results based on our implementation of LSTAFF and previous FTL algorithms using a flash simulator.

• Journal of KIISE:Computer Systems and Theory
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• v.36 no.6
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• pp.521-531
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• 2009

Flash memory has physical characteristics different from hard disk where two costs of a read and write operations differ each other and an overwrite on flash memory is impossible to be done. In order to solve these restrictions with software, storage systems equipped with flash memory deploy FTL(Flash Translation Layer) software. Several FTL algorithms have been suggested so far and most of them prefer sequential write pattern to random write pattern. In this paper, we provide a new technique to efficiently store and maintain the B-tree index on flash memory. The operations like inserts, deletes, updates of keys for the B-tree generate random writes rather than sequential writes on flash memory, leading to inefficiency to the B-tree maintenance. In our technique, we convert random writes generated by the B-tree into sequential writes and then store them to the write-buffer on flash memory. If the buffer is full later, some sequential writes in the buffer will be issued to FTL. Our diverse experimental results show that our technique outperforms the existing ones with respect to the I/O cost of flash memory.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.4
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• pp.177-185
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• 2005

NAND-type flash memory is becoming increasingly popular as a large data storage for mobile computing devices. Since flash memory is an order of magnitude more expensive than magnetic disks, data compression can be effectively used in managing flash memory based storage systems. However, compressed data management in NAND-type flash memory is challenging because it supports only page-based I/Os. For example, when the size of compressed data is smaller than the page size. internal fragmentation occurs and this degrades the effectiveness of compression seriously. In this paper, we present an efficient flash compression layer (FCL) for NAND-type flash memory which stores several small compressed pages into one physical page by using a write buffer Based on prototype implementation and simulation studies, we show that the proposed scheme offers the storage of flash memory more than $140\%$ of its original size and expands the write bandwidth significantly.