• Title/Summary/Keyword: 프로그램 로직 컨트롤러

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Efficient Programming Method in Microcontrollers for Improving Latency (지연시간을 개선하기 위한 마이크로 컨트롤러의 효율적인 프로그래밍 방법)

  • Lee, Kyungnam;Kim, Youngmin
    • Journal of IKEEE
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    • v.23 no.3
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    • pp.1068-1076
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    • 2019
  • Most of the electronics we use today have built-in microcontrollers, which are called embedded systems. In such a small environment, responsiveness is very important for the microcontroller. In this paper, the basic input/output control, timer/counter interrupt operation principle, and understanding of the microcontroller are described. Program logic is proposed to improve throughput and latency by controlling characteristics of service routine and program execution order. The hardware simulations in this paper were verified using ATmega128 and PIC16F877A from Atmel and Microchip.

Pre-coating applied purifier water control system. (프리코팅방식을 적용한 정수기 제어 시스템)

  • Jung, Yong-kuk;Kweon, Min-Su;Heo, Kwang-Seon;Kim, Dae-Sung;Choi, Young-Gyu
    • Proceedings of the Korea Information Processing Society Conference
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    • 2011.11a
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    • pp.1139-1141
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    • 2011
  • 기존의 산업용 컨트롤러로 많이 사용되는 프로그래머블 로직 컨트롤러(PLC)를 사용할시 고비용과 큰 부피로 인해 정수기를 소형으로 만들기 어렵다. 따라서 본 가정용 정수기는 소형 MCU 사용과 동시에 정수기에 최적화된 PCB를 제작하여 정수기를 소형화 하였다. 재 프로그램 가능한 MCU 채택으로 추후 시스템이 변경되거나, 프로그램에 보완사항이 필요할 경우 손쉽게 업그레이드가 가능하도록 설계하였다.

Design of A Low-voltage 3V CMOS Programmable Gain Amplifier (저전압 3V CMOS 프로그래머블 이득 증폭기 설계)

  • Song, Je-Ho;Bang, Jun-Ho;Yu, Jae-Young
    • Proceedings of the KAIS Fall Conference
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    • 2011.05a
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    • pp.358-361
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    • 2011
  • 본 논문에서는 ADSL용 아날로그 Front-end의 수신단과 송신단에 활용하기 위한 저전압 특성의 3V CMOS 프로그램머블 증폭기(PGA)를 설계하였다. 설계된 수신단의 PGA는 1.1MHz로 연속시간 저역통과 필터와 연결하여 0dB에서 30dB까지 이득을 조정해주며, 송신단의 PGA는 138kHz의 저역필터와 연결하여 -15dB에서 0dB까지의 이득을 조정할 수 있다. 모든 PGA의 이득은 디지털 로직과 메인 컨트롤러에 의해서 프로그램될 수 있도록 설계하였다. 설계된 PGA는 $0.35{\mu}m$ CMOS 파라미터를 이용하여 Hspice 시뮬레이션으로 그 특성을 확인하였다.

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Design and Implementation of a Single-Chip 8-Bit Microcontroller (단일 칩 8비트 마이크로컨트롤러의 설계 및 구현)

  • Ahn, Jung-Il;Park, Sung-Hwan;Kwon, Sung-Jae
    • Journal of Korea Society of Industrial Information Systems
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    • v.11 no.4
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    • pp.72-81
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    • 2006
  • In this paper, we first define a total of 64 instructions that are considered to be essential and frequently used, construct a datapath diagram, determine the control sequence using a finite state machine, and implement an 8-bit microcontroller using FPGA in VHDL. In the past, only functional simulation results of a rudimentary microcontroller were reported, the microcontroller lacked interrupt handling capability, or it was not implemented in hardware. We have designed a self-contained 8-bit microcontroller such that it can perform data transfer, addition, and logical operations, as well as stack and external interrupt operations. Following timing simulation of the designed microcontroller, we implemented it in an FPGA and verified its operation successfully. The design and implementation has been done under the Altera MAX+PLUS II integrated development environment using the EP1K50TC144-3 chip. The maximum operating frequency, the total number of logic elements used, and the logic utilization were found to be 9.39 MHz, 2813, and 97%, respectively. The result can be used as a microcontroller IP, and as needs arise, the VHDL code can be modified accordingly.

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A Structural Testing Strategy for PLC Programs Specified by Function Block Diagram (함수 블록 다이어그램으로 명세된 PLC 프로그램에 대한 구조적 테스팅 기법)

  • Jee, Eun-Kyoung;Jeon, Seung-Jae;Cha, Sung-Deok
    • Journal of KIISE:Software and Applications
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    • v.35 no.3
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    • pp.149-161
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    • 2008
  • As Programmable Logic Controllers(PLCs) are frequently used to implement real-time safety critical software, testing of PLC software is getting more important. We propose a structural testing technique on Function Block Diagram(FBD) which is one of the PLC programming languages. In order to test FBD networks, we define templates for function blocks including timer function blocks and propose an algorithm based on the templates to transform a unit FBD into a flowgraph. We generate test cases by applying existing testing techniques to the generated flowgraph. While the existing FBD testing technique do not consider infernal structure of FBD to generate test cases and can be applied only to FBD from which the specific intermediate model can be generated, this approach has advantages of systematic test case generation considering infernal structure of FBD and applicability to any FBD without regard to its intermediate format. Especially, the proposed method enables FBD networks including timer function blocks to be tested thoroughly. To demonstrate the effectiveness of the proposed method, we use trip logic of bistable processor of digital nuclear power plant protection systems which is being developed in Korea.

A Study on the Development of Automation Unloader for Press Metalmold (프레스 금형용 Unloader 자동화 시스템개발에 관한 연구)

  • 김재열
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 1996.10a
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    • pp.156-160
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    • 1996
  • In this study of made Unloader is moving linear transfer system for mainly plastic working or forming of small electronic unit and other at press line. This machine for lading and unloading a workpiece has been installed in a press in order to load and unload a workpiece form a press die. Control method be used PLC. it took data of input from each sensor and send signal of output to actuator today we have a lot of problem at work of press line. most of press work be operated by human so they often hurted terreble accident by press machine. Because press working system in automotive factories are now changing over to a transfer press working system this Unloader will give more easily and speedy production and manpower saving less of pruduction cost high perfomance

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Design of A 3V CMOS Programmable Gain Amplifier for the Information Signal Processing System (정보처리 시스템용 3V CMOS 프로그래머블 이득 증폭기 설계)

  • 송제호;김환용
    • Journal of Korea Multimedia Society
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    • v.5 no.6
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    • pp.753-758
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    • 2002
  • In this paper, low voltage 3V CMOS programmable gain amplifier(PGA) for using in the transmitter and receiver of ADSL analog front-end is designed. The designed receive PGA is connected with 1.1MHz continuous lowpass fillet and controls the gain from 0dB to 30dB. And also the transmitter PGA is connected with 138KHz lowpass filter and controls the gain from -15dB to 0dB. The gain of All PGAs can be programmed by digital logic circuits and main controller. The designed PGAs are verified using HSPICE simulation with $0.35\mu{m}$ CMOS parameter.

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Cooling Control of Greenhouse Using Roof Window Ventilation by Simple Fuzzy Algorithm (단순 퍼지 제어기법을 이용한 온실의 천창환기에 의한 냉방제어)

  • Min, Young-Bong;Yoon, Yong-Cheol;Huh, Moo-Ryong;Kang, Dong-Hyun;Kim, Hyeon-Tae
    • Journal of agriculture & life science
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    • v.44 no.4
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    • pp.69-77
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    • 2010
  • Fuzzy control is widely used for improving temperature control performance as controlling ventilation in greenhouse because the technique can respond more flexibly to the outside air temperature and wind speed. By pre-studied PID and normal fuzzy control this study was performed to obtain the fundamental data that can be established in better greenhouse ventilation control method. The temperature control error by the simple fuzzy control was $1.2^{\circ}C$. The accumulated operating size of the window and the number of operating were 84% and 13, respectively. These showed equivalent control performance with pre-studied result that control error. The accumulated operating size of the window and the number of operating were 75% and 12, respectively. The proposed fuzzy technique was simple control logic method compared with step and PID control methods, but it showed equivalent performance. Therefore, the proposed simple fuzzy control method could be used in micro controller of small programmable memory size and many applications.

Design and Implementation of 3-Axis Control System using The Non-Linear Algorithm (비선형 알고리즘을 이용한 3축 제어 시스템의 설계 및 제작)

  • Cho, Byeong-Gwan;Lee, Hwan-Hee;Choi, Woo-Jin;Kim, Yu-Gi;Lee, Seung-Dae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.17 no.5
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    • pp.833-840
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    • 2022
  • The precision of automation equipment and motors in factories is required, and global motor market has increased significantly. However, domestic motor technology lags behind foreign technology. In this thesis, the precision stability and efficiency were compared with a linear algorithm by applying a non-linear algorithm to a PLC servo motor and an Arduino step motor in order to improve the technology of the motor. The nonlinear algorithm was able to shorten the same driving reference time because the maximum speed of the motor was faster than the linear algorithm, and it was confirmed that the precision was improved due to the low curvature.

PLC and Arduino CNC Control for Comparison of 2D Outputs (2D 출력물 비교를 위한 PLC와 아두이노 CNC 제어)

  • Cho, Hae-Jun;Kim, Kang-Ho;Jang, Hyun-Su;Jeon, Jong-Hwan;Lee, Seung-Dae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.16 no.6
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    • pp.1295-1302
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    • 2021
  • As the market size of 3D printers increases, the precision of the printout and the speed of operation by the motor are very important issues. In this parer, G-code of each output was generated using a CURA program to compare whether the output of the PLC equipment is the same as that of the Arduino CNC. And after conversion to NC File, a pen was attached to each device to output a result to A4 paper. As a result, the output time was measured to be 1m 39s for PLC equipment and 2m 5s for Arduino CNC. In addition, it was confirmed that the 2D output was equally from the two equipments.