• Title/Summary/Keyword: 폴라

Search Result 262, Processing Time 0.032 seconds

A Design of Bipolar Transresistance Amplifiers (바이폴라 트랜스레지스턴스 증폭기 설계)

  • Cha, Hyeong-U;Im, Dong-Bin;Song, Chang-Hun
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.38 no.11
    • /
    • pp.828-835
    • /
    • 2001
  • Novel bipolar transresistance amplifier(TRA) and its offset-compensated TRA for high-performance current-mode signal processing are described. The TRA consist of two current follower for a current inputs, a current summer for the current-difference, a resistor for the current to voltage converter, and a voltage follower for the voltage output. The offset-compensated TRA adopts diode-connected npn and pnp transistor to reduce offset voltage in the TRA. The simulation results show that the TRA has impedance of 0.5 Ω at the input and the output terminal. The offset voltages at these terminals is 40 mV The offset-compensated TRA has the offset voltage of 1.1 mV and the impedance of 0.25 Ω. The 3-dB cutoff frequency is 40 MHz for the two TRA's when used as a current to voltage converter with unit-gain transresistance. The power dissipation is 11.25 mW.

  • PDF

Electric Power Line Dips Measurement Using Drone-based Photogrammetric Techniques (드론 기반 사진측량기법을 활용한 고압 송전선의 처짐량 측정)

  • Kim, Yu Jong;Oh, Jae Hong;Lee, Chang No
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
    • /
    • v.35 no.6
    • /
    • pp.453-460
    • /
    • 2017
  • High voltage power transmission lines have been to keep the proper dip for maintenance. Powerline dips at a random point are conventionally measured by the direct or indirect observation but it is not only unsafe but labor-intensive. Therefore in this study we applied the photogrammetric technique to remotely measure the powerline dips. Since it is not easy to extract conjugate points from linear powerlines, we exploited the epipolar lines acrossing the powerlines for 3D mapping of the powerlines and dip measurements. The vertical mapping accuracy estimated at two field-surveyed power line points was 15~16cm that are within 5% of deflection at the points and less than 3% of the powerline dip.

Degradation of the SiGe hetero-junction bipolar transistor in SiGe BiCMOS process (실리콘-게르마늄 바이시모스 공정에서의 실리콘-게르마늄 이종접합 바이폴라 트랜지스터 열화 현상)

  • Kim Sang-Hoon;Lee Seung-Yun;Park Chan-Woo;Kang Jin-Young
    • Journal of the Korean Vacuum Society
    • /
    • v.14 no.1
    • /
    • pp.29-34
    • /
    • 2005
  • The degradation of the SiGe hetero-junction bipolar transistor(HBT) properties in SiGe BiCMOS process was investigated in this paper. The SiGe HBT prepaired by SiGe BiCMOS process, unlike the conventional one, showed the degraded DC characteristics such as the decreased Early voltage, the decreased collector-emitter breakdown voltage, and the highly increased base leakage current. Also, the cutoff frequency(f/sub T/) and the maximum oscillation frequency(f/sub max/) representing the AC characteristics are reduced to below 50%. These deteriorations are originated from the change of the locations of emitter-base and collector-base junctions, which is induced by the variation of the doping profile of boron in the SiGe base due to the high-temperature source-drain annealing. In the result, the junctions pushed out of SiGe region caused the parastic barrier formation and the current gain decrease on the SiGe HBT device.

A Design of Output Voltage Compensation Circuits for Bipolar Integrated Pressure Sensor (바이폴라 공정을 이용한 압력센서용 출력전압 보상회로의 설계)

  • Lee, Bo-Na;Kim, Kun-Nyun;Park, Hyo-Derk
    • Journal of Sensor Science and Technology
    • /
    • v.7 no.5
    • /
    • pp.300-305
    • /
    • 1998
  • In this paper, integrated pressure sensor with calibration of offset voltage and full scale output and temperature compensation of offset voltage and full scale output were designed. The signal conditioning circuitry are designed that calibrate the offset voltage and full scale output to desired values and minimize the temperature drift of offset voltage and full scale output. Designed circuits are simulated using SPICE in a bipolar technology. The ion implanted resistor of different temperature coefficient were used to trimming the desired values. As a results, offset voltage was calibrated to 0.133V and the temperature drift of offset voltage was reduced to $42\;ppm/^{\circ}C$. Also, the full scale output was calibrated to 4.65V and the temperature coefficient of full scale output was reduced to $40ppm/^{\circ}C$ after temperature compensation.

  • PDF

A Study on Chopper Circuit for Variation of Inductance and Threshold Voltage based on IGBT (IGBT 기반 인덕턴스 및 문턱전압 변화에 따른 초퍼 회로의 연구)

  • Lho, Young-Hwan
    • Journal of the Korean Society for Railway
    • /
    • v.13 no.5
    • /
    • pp.504-508
    • /
    • 2010
  • The development of high voltage Insulated Gate Bipolar Transistor (IGBT) have given new device advantage in the areas where they compete with conventional GTO (Gate Turnoff Thyristor) technology. The IGBT combines the advantages of a power MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor) and a bipolar power transistor. The change of electrical characteristics for IGBT is mainly coming from the change of characteristics of MOSFET at the input gate and the PNP transistors at the output. The change of threshold voltage, which is one of the important design parameters, is brought by charge trapping at the gate oxide under the environment that radiation exists. The energy loss will be also studied as the inductance values are changed. In this paper, the electrical characteristics are simulated by SPICE, and compared for variation of inductance and threshold voltage based on IGBT.

A Design of Class A Bipolar Current Conveyor(CCII) with Low Current-Input Impedance and Its Offset Compensated CCII (낮은 전류-입력 임퍼던스를 갖는 A급 바이폴라 전류 콘베이어(CCII)와 그것의 오프셋 보상된 CCII 설계)

  • Cha, Hyeong-U
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.38 no.10
    • /
    • pp.754-764
    • /
    • 2001
  • Class A bipolar second-generation current conveyor (CCII) with low current-input impedance and its offset-compensated CCII for high-accuracy current-mode signal processing are proposed. The CCIIs consist of a regulated current-cell for current input, a emitter follower for voltage input, and a cascode current mirror lot current output. In these architecture, the two input stages are coupled by current mirror to reduce the current input impedance. Experiments show that the CCII has impedance of 8.4 Ω and offset voltage of 40 mV at current input terminal. To reduce this offset, the offset-compensated CCII adopts diode-connected npn and pnp transistor in the proposed CCII. Experiments show that the offset-compensated CCII has current input impedance of 2.1 Ω and offset voltage of 0.05 mV. The 3-dB cutoff frequency of the CCIIs when used as a voltage follower extends beyond 30 MHz. The power dissipation is 7.0 mW

  • PDF

Implementation of a Single Human Detection Algorithm for Video Digital Door Lock (영상디지털도어록용 단일 사람 검출 알고리즘 구현)

  • Shin, Seung-Hwan;Lee, Sang-Rak;Choi, Han-Go
    • The KIPS Transactions:PartB
    • /
    • v.19B no.2
    • /
    • pp.127-134
    • /
    • 2012
  • Video digital door lock(VDDL) system detects people who access to the door and acquires the human image. Design considerations is that current consumption must be minimized by applying fast human detection algorithm because of battery-based operation. Since the digital door lock takes an image through a fixed camera, detection of a person based on background image leads to high degree of reliability. This paper deals with a single human detection algorithm suitable for VDDL with fulfilling these requirements such that it detects a moving object in an image, then identifies whether the object is a person or not using image processing. The proposed image processing algorithm consists of two steps: Firstly, it detects the human image region using both background image and skin color information. Secondly, it identifies the person using polar histogram based on proportional information of human body. Proposed algorithm is implemented in VDDL and is verified the performance through experiments.

Numerical Analysis of a Two-Dimensional N-P-N Bipolar Transistor-BIPOLE (2차원 N-P-N 바이폴라 트랜지스터의 수치해석-BIPOLE)

  • 이종화
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.21 no.2
    • /
    • pp.71-82
    • /
    • 1984
  • A programme, called BIPOLE, for the numerical analysis of twotimensional n-p-n bipolar transistors was developed. It has included the SRH and Auger recolnbination processes, the mobility dependence on the impurity density and the electric field, and the band-gap narrowing effect. The finite difference equations of the fundamental semiconductor equations are formulated using Newton's method for Poisson's equation and the divergence theorem for the hole and electron continuity equations without physical restrictions. The matrix of the linearized equations is sparse, symmetric M-matrix. For the solution of the linearized equations ICCG method and Gummel's algorithm have been employed. The programme BIPOLE has been applied to various kinds of the steady-state problems of n-p-n transistors. For the examples of applications the variations of common emitter current gain, emitter and diffusion capacitances, and input and output characteristics are calculated. Three-dimensional representations of some D.C. physical quantities such as potential and charge carrier distributions were displayed. This programme will be used for the nome,rical analysis of the distortion phenom ana of two-dimensional n-p-n transistors. The BIPOLE programme is available for everyone.

  • PDF

Low-voltage high-linear bipolar OTA and its application to IF bandpass Filter (저전압 고선형 바이폴라 OTA와 이를 이용한 IF 대역통과 필터)

  • Chung, Won-Sup;Son, Sang-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.7 s.361
    • /
    • pp.37-44
    • /
    • 2007
  • A low-voltage high-linear bipolar OTA and its application to IF bandpass filter for GSM cellular telephone are presented. The OTA consists of a low-voltage linear transconductor, a translinear current gain cell, and three current mirrors. The bandpass filter is composed of two cascaded identical second-order bandpass filters, which consist of a resistor, a capacitor, and a grounded simulated inductor realized with two OTA's and a grounded capacitor. SPICE simulations using an 8 GHz bipolar transistor-array parameter show that the OTA with a transconductance of 1 mS exhibits a linearity error of less than ${\pm}2%$ over an input voltage range of ${\pm}0.65\;V$ at supply voltages of ${\pm}2.0\;V$. Temperature coefficient of the transconductance is less than $-90ppm/^{\circ}C$. The bandpass filter has a center frequency of 85 MHz and Q-factor of 80. Temperature coefficient of the center frequency is less than $-182ppm/^{\circ}C$. The power dissipation of the filter is 128 mW.

Using Contour Matching for Omnidirectional Camera Calibration (투영곡선의 자동정합을 이용한 전방향 카메라 보정)

  • Hwang, Yong-Ho;Hong, Hyun-Ki
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.45 no.6
    • /
    • pp.125-132
    • /
    • 2008
  • Omnidirectional camera system with a wide view angle is widely used in surveillance and robotics areas. In general, most of previous studies on estimating a projection model and the extrinsic parameters from the omnidirectional images assume corresponding points previously established among views. This paper presents a novel omnidirectional camera calibration based on automatic contour matching. In the first place, we estimate the initial parameters including translation and rotations by using the epipolar constraint from the matched feature points. After choosing the interested points adjacent to more than two contours, we establish a precise correspondence among the connected contours by using the initial parameters and the active matching windows. The extrinsic parameters of the omnidirectional camera are estimated minimizing the angular errors of the epipolar plane of endpoints and the inverse projected 3D vectors. Experimental results on synthetic and real images demonstrate that the proposed algorithm obtains more precise camera parameters than the previous method.