• Title/Summary/Keyword: 터널링 트랜지스터

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2D Tunneling Effect of Pocket Tunnel Field Effect Transistor (포켓 구조 터널링 전계효과 트랜지스터의 2D 터널링 효과)

  • Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.10a
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    • pp.243-244
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    • 2017
  • This paper introduces about the difference between the tunneling currents in the 1D and 2D directions for the calculation of the band-to-band tunneling currents of the tunneling field effect transistors. In the two-dimensional tunneling, diagonal tunneling is not calculated in the one-dimensional tunneling so that more accurate tunneling current can be calculated. Simulation results show that the tunneling in the two - dimensional direction has no effect on the voltage above the threshold voltage, but it affects the subthreshold swing below the threshold voltage.

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Guide Lines for Optimal Structure of Silicon-based Pocket Tunnel Field Effect Transistor Considering Point and Line Tunneling (포인트 터널링과 라인 터널링을 모두 고려한 실리콘 기반의 포켓 터널링 전계효과 트랜지스터의 최적 구조 조건)

  • Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.167-169
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    • 2016
  • The structure guide lines of pocket tunnel field effect transistor(TFET) considering Line and Point tunneling are introduced. As the pocket doping concentration or thickness increase, on-current $I_{on}$ increases. As the pocket thickness or gate insulator increase, subthreshold swing(SS) increases. Optimal structure reducing the hump effects should be proposed in order to enhance SS.

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Investigation of Trap-Assisted-Tunneling Mechanism in L-Shaped Tunneling Field-Effect-Transistor at Low Bias (L형 터널 트랜지스터의 트랩-보조-터널링 현상 조사)

  • Najam, Faraz;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2019.05a
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    • pp.475-476
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    • 2019
  • L-shaped tunneling field-effect-transistor (LTFET) is considered a superior device over conventional TFETs. However, experimentally demonstrated LTFET demonstrated poor subthreshold characteristics which was attributed to trap-assisted-tunneling (TAT) caused by presence of trap states. In this paper, TAT mechanism in the experimentally demonstrated LTFET is investigated with the help of band diagram and TAT recombination rate (GTAT).

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Structure Guide Lines of Silicon-based Pocket Tunnel Field Effect Transistor (실리콘 기반 포켓 구조 터널링 전계효과 트랜지스터의 최적 구조 조건)

  • Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.05a
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    • pp.166-168
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    • 2016
  • This paper introduces about the structure guide lines of pocket tunneling Field effect transistor. As the pocket length or thickness increase, on-current $I_{on}$ increases. As the pocket thickness is less than 3nm, subthreshold swing (SS) increase. As the dielectric constants of the gate insulator increases, the performance of on-current and subthreshold swing enhances.

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Electrical Characteristics of Ambipolar Thin Film Transistor Depending on Gate Insulators (게이트 절연특성에 의존하는 양방향성 박막 트랜지스터의 동작특성)

  • Oh, Teresa
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.5
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    • pp.1149-1154
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    • 2014
  • To observe the tunneling phenomenon of oxide semiconductor transistor, The Indium-gallum-zinc-oxide thin film transistors deposited on SiOC as a gate insulator was prepared. The interface characteristics between a dielectric and channel were changed in according to the properties of SiOC dielectric materials. The transfer characteristics of a drain-source current ($I_{DS}$) and gate-source voltage ($V_{GS}$) showed the ambipolar or unipolar features according to the Schottky or Ohmic contacts. The ambipolar transfer characteristics was obtained at a transistor with Schottky contact in a range of ${\pm}1V$ bias voltage. However, the unipolar transfer characteristics was shown in a transistor with Ohmic contact by the electron trapping conduction. Moreover, it was improved the on/off switching in a ambipolar transistor by the tunneling phenomenon.

Investigation of Trap-Assisted-Tunneling Mechanism in L-Shaped Tunneling Field-Effect-Transistor (L형 터널 트랜지스터의 트랩-보조-터널링 현상 조사)

  • Najam, Faraz;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.10a
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    • pp.512-513
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    • 2018
  • Trap-assisted-tunneling (TAT) degrades subthreshold slope of real-world tunneling field-effect-transistors (TFET) and it should be considered in the simulation. However, its mechanism is not very well understood in line tunneling type L-shaped TFET (LTFET). This study investigates TAT mechanism in LTFETs using dynamic nonlcoal Schenk model. Both phonon assisted and direct band to trap tunneling events are considered in this study.

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Comparative Investigation on Tunnel Field Effect transistors(TFETs) Structure (터널링 전계효과 트랜지스터 구조 특성 비교)

  • Shim, Un-Seong;Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.616-618
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    • 2016
  • Four types of structure of tunnel field-effect transistors (TFETs) have been investigated by TCAD simulation. Pocket and L-shaped TFETs are better performance than single-gate and double-gate TFETs in terms of on-current and subthreshold swing. New guideline of TFETs is presented for the structure design.

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Source-Overlapped Gate Length Effects at Tunneling current of Tunnel Field-Effect Transistor (소스영역으로 오버랩된 게이트 길이 변화에 따른 터널 트랜지스터의 터널링 전류에 대한 연구)

  • Lee, Ju-Chan;Ahn, Tae-Jun;Sim, Un-Sung;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.611-613
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    • 2016
  • The characteristics of tunnel field-effect transistor(TFET) structure with source-overlapped gate was investigated using a TCAD simulations. Tunneling is mostly divided into line-tunneling and point-tunneling, and line-tunneling is higher performance than point-tunneling in terms of subthreshold swing(SS) and on-current. In this paper, from the simulation results of source-overlapped gate length effects at silicon(Si), germanium(Ge), Si-Ge hetero TFET structure, the guideline of optimal structure with highest performance are proposed.

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Study on Point and Line Tunneling in Si, Ge, and Si-Ge Hetero Tunnel Field-Effect Transistor (Si, Ge과 Si-Ge Hetero 터널 트랜지스터의 라인 터널링과 포인트 터널링에 대한 연구)

  • Lee, Ju-chan;Ann, TaeJun;Sim, Un-sung;Yu, YunSeop
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.5
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    • pp.876-884
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    • 2017
  • The current-voltage characteristics of Silicon(Si), Germanum(Ge), and hetero tunnel field-effect transistors(TFETs) with source-overlapped gate structure was investigated using TCAD simulations in terms of tunneling. A Si-TFET with gate oxide material $SiO_2$ showed the hump effects in which line and point tunneling appear simultaneously, but one with gate oxide material $HfO_2$ showed only the line tunneling due to decreasing threshold voltage and it shows better performance than one with gate oxide material $SiO_2$. Tunneling mechanism of Ge and hetero-TFETs with gate oxide material of both $SiO_2$ and $HfO_2$ are dominated by point tunneling, and showed higher leakage currents, and Si-TFET shows better performance than Ge and hetero-TFETs in terms of SS. These simulation results of Si, Ge, and hetero-TFETs with source-overlapped gate structure can give the guideline for optimal TFET structures with non-silicon channel materials.

I-V Characteristics of the TFT Analyzed by Tunneling in Grain Boundaries (粒界에서의 터널링으로 解析한 薄膜트랜지스터의 電流-電壓 特性)

  • Ma, Tae-Young
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.6
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    • pp.23-29
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    • 1989
  • A physical model that characterizes the field effect of the polycrystalline thin film transistor(TFT) is developed. The model discribes grains as discrete single crystal transistors and grain boundaries as insulated layers having the potential barrier, Thus TFT is considered as serial connection of single crystal transistors and insulators. In the model, the currents in the grain and the grain boundary is calculated using gradual channel approximation and tunneling theory, respetively. By comparing computed I-V characteristics with measured I-V characteristics of CdSe TFT's, potential and electric field distributions in the channel are observed and the validity of the conduction model proposed in this paper is confirmed.

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