• Journal of Satellite, Information and Communications
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• v.12 no.1
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• pp.38-42
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• 2017

This paper introduces the concept of a dual hash function to amplify security in a quantum key distribution system. We show the use of the relationship between quantum error correction and security to provide security amplification. Also, in terms of security amplification, the approach shows that phase error correction offers better security. We describe the process of enhancing security using the universal hash function using the BB84 protocol, which is a typical example of QKD. Finally, the deterministic universal hash function induces the security to be evaluated in the quantum Pauli channel without depending on the length of the message.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6B
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• pp.1059-1067
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• 1999

In this paper characteristics of ATM-PON is described and a TC layer controller for ATM-PON OLT is designed. This paper proposes an algorithm of economically controlling the grant information written by CPU to dynamically allocate the upstream bandwidth on the PON among the ONUs in a fair way and of encrypting the downstream data using a lower standard of encryption, termed data churning, which is used to distinguish it from existing transmission system scramblers and higher layer encryption methods. This paper also proposes a method of allocating churning-related message into the PLOAM cell in order to synchronously change the churning key between the OLT and the ONU.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.289-292
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• 2001

종래에 사용되어 왔던 1차원 바코드가 정보를 포함하고 있는 데이터베이스에 접근하는 데이터 키 역할을 주로 해온 것에 비해, 2차원 바코드는 다량의 데이터를 포함할 수 있고 고밀도의 데이터 표현이 가능하여, 호스트 컴퓨터의 데이터 베이스에 온라인 연결할 필요없이 확인하고자 하는 사람이나 대상물에 대한 정보를 얻을 수 있다. 본 논문에서는 가장 널리 사용되는 2차원 바코드 체계인 PDF417 을 중심으로 디지털 카메라를 통하여 입력한 영상을 이진화하여 시작 심볼 또는 정지 심볼을 검색함으로써 2차원 바코드 영역을 추출한 다음, 추출된 영역으로부터 바코드의 행과 열의 수, 오류수정 정도 등의 헤더정보를 검출하고 이를 바탕으로 코드워드를 추출하는 알고리즘을 제안한다. 얻어진 코드워드는 데이터를 효율적으로 저장하기위해 정보가 숫자인지, ASCII코드인지 혹은 바이트 정보인지에 따라 다른 방식으로 인코딩 되어 있는데, 그에 따른 디코딩 알고리즘을 제안한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.8A
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• pp.820-826
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• 2007

This paper proposes an enhanced degree computationless modified Euclid's(E-DCME) algorithm and its architecture for Reed-Solomon decoders. The proposed E-DCME algorithm has shorter critical path delay that is $T_{mult}+T_{add}+T_{mux}$ compared with the existing modified Euclid's algorithm and the degree computationless modified Euclid's(DCME) algorithm since it uses new initial conditions. The proposed E-DCME architecture employing a systolic array requires only 2t-1 clock cycles to solve the key equation without initial latency. In addition, the E-DCME architecture consisting of 3t basic cells has regularity and scalability since it uses only one processing element. The E-DCME architecture using the $0.18{\mu}m$ Samsung standard cell library consists of 18,000 gates.

• Convergence Security Journal
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• v.15 no.3_1
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• pp.99-105
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• 2015

A typical SRAM-based PUF is used in random number generation and key exchange process. The generated out puts should be preserved, but the values are changed owing to the external environment. This paper presents a new D-PUF logic employing a dual anti-fuse OTP memory to the SRAM-based PUF. The proposed PUF can enhance the reliability of the logic since it can preserve the output values. First, we construct the OTP memory using an anti-fuse. After power up, a SRAM generates the random values owing to the mismatch of cross coupled inverter pair. The generated random values are programed in the proposed anti-fuse ROM. The values that were programed in the ROM at once will not be changed and returned. Thus, the outputs of the proposed D-PUF are not affected by the environment variable such as the operation voltage and temperature variation, etc. Consequently, the reliability of the proposed PUF will be enhanced owing to the proposed dual anti-fuse ROM. Therefore, the proposed D-PUF can be stably operated, in particular, without the powerful ECC in the external environment that are changed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.459-468
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• 2003

This paper proposes a novel low-cost and high-speed Reed-Solomon (RS) decoder based on a new degree computationless modified Euclid´s (DCME) algorithm. This architecture has quite low hardware complexity compared with conventional modified Euclid´s (ME) architectures, since it can remove completely the degree computation and comparison circuits. The architecture employing a systolic away requires only the latency of 2t clock cycles to solve the key equation without initial latency. In addition, the DCME architecture using 3t＋2 basic cells has regularity and scalability since it uses only one processing element. The RS decoder has been synthesized using the 0.25${\mu}{\textrm}{m}$. Faraday CMOS standard cell library and operates at 200MHz and its data rate suppots up to 1.6Gbps. For tile (255, 239, 8) RS code, the gate counts of the DCME architecture and the whole RS decoder excluding FIFO memory are only 21,760 and 42,213, respectively. The proposed RS decoder can reduce the total fate count at least 23% and the total latency at least 10% compared with conventional ME architectures.