• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.3
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• pp.261-264
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• 2005

The 90 nm gate pattern technology have been virtualized by employing the hard mask and the planarization of fate poly silicon. We fabricated 70nm poly-Si on $200 nm-SiO_2/p-Si(100)$ substrates using low pressure chemical vapor deposition (LPCVD) to investigate roughness evolution by varying rapid annealing temperatures. The samples were annealed at the temperatures of $700^{\circ}C\~1100^{\circ}C$ for 40 seconds with a rapid thermal annealer. The surface image and the surface roughness were measured by a field emission scanning electron microscopy (FESEM) and an atomic force microscopy (AFM), respectively. The poly silicon surface became more rough as temperature increased due to surface agglomeration. The optimum conditions of poly silicon planarization were achieved by annealed at $700^{\circ}C$ for 40 seconds.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.22 no.2
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• pp.26-32
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• 2021

The photovoltaic properties and microstructure changes were observed while perovskite solar cells (PSCs) with a fabricated carbon electrode were formed using the following annealing processes: hot-plate, oven, and rapid thermal annealing (RTA). Perovskite solar cells with a glass/FTO/compact TiO2/meso TiO2/meso ZrO2/carbon structure were prepared. The photovoltaic properties and microstructure changes in the PSCs were analyzed using a solar simulator, optical microscopy, and field emission scanning electron microscopy. An analysis of the photovoltaic properties revealed outstanding properties when RTA was applied to the cells. Microstructure analysis showed that perovskite was formed locally on the carbon electrode surface when hot-plate and oven annealing were applied. On the other hand, PSC with RTA showed a flat surface without extra perovskite agglomeration. Denser perovskite formed on the porous carbon electrode layer with RTA showed superior photovoltaic properties. These results suggest that the RTA process might be appropriate for the massive production of carbon electrode PSCs considering the processing time.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.2 s.35
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• pp.149-154
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• 2005

We fabricated Ni/Co(or Co/Ni) composite silicide layers on the non-patterned wafers from Ni(20 nm)/Co(20 nm)/poly-Si(70 nm) structure by rapid thermal annealing of $700{\~}1100^{\circ}C$ for 40 seconds. The sheet resistance, cross-sectional microstructure, and surface roughness were investigated by a four point probe, a field emission scanning electron microscope, and a scanning probe microscope, respectively. The sheet resistance increased abruptly while thickness decreased as silicidation temperature increased. We propose that the poly silicon inversion due to fast metal diffusion lead to decrease silicide thickness. Our results imply that we should consider the serious inversion and fast transformation in designing and process f3r the nano-height fully cobalt nickel composite silicide gates.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.528-537
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• 2008

60 nm and 20 nm thick hydrogenated amorphous silicon(a-Si:H) layers were deposited on 200 nm $SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by an e-beam evaporator. Finally, 30 nm-Ni/(60 nm and 20 nm) a-Si:H/200 nm-$SiO_2$/single-Si structures were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 40 sec. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy(FE-SEM), transmission electron microscopy(TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide from the 60 nm a-Si:H substrate showed low sheet resistance from $400^{\circ}C$ which is compatible for low temperature processing. The nickel silicide from 20 nm a-Si:H substrate showed low resistance from $300^{\circ}C$. Through HRXRD analysis, the phase transformation occurred with silicidation temperature without a-Si:H layer thickness dependence. With the result of FE-SEM and TEM, the nickel silicides from 60 nm a-Si:H substrate showed the microstructure of 60 nm-thick silicide layers with the residual silicon regime, while the ones from 20 nm a-Si:H formed 20 nm-thick uniform silicide layers. In case of SPM, the RMS value of nickel silicide layers increased as the silicidation temperature increased. Especially, the nickel silicide from 20 nm a-Si:H substrate showed the lowest RMS value of 0.75 at $300^{\circ}C$.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.3
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• pp.615-620
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• 2008

We fabriacted thermal evaporated $10nm-Ni_{1-x}Co_x$(x=0.2, 0.6, and 0.7) films on 70 nm-thick polysilicon substrate with $0.5{\mu}m$ line width. NiCo composite silicide layers were formed by rapid thermal annealing (RTA) at the temperatures of $700^{\circ}C$ and $1000^{\circ}C$. Then, we checked the microstructure evaluation of silicide patterns. A FIB (focused ion beam) was used to micro-mill the interconnect patterns with low energy condition (30kV-10pA-2 sec). We investigated the possibility of selective removal of silicide layers. It was possible to remove low resistance silicide layer selectively with the given FIB condition for our proposed NiCo composite silicides. However, the silicides formed from $Ni_{40}Co_{60}$ and $Ni_{30}Co_{70}$ composition showed void defects in interconnect patterns. Those void defects hinder the selective milling for the NiCo composite silicides.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.1
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• pp.16-22
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• 2008

We fabricated thermally-evaporated 10 nm-Ni/30 nm and 70 nm Poly-Si/200 nm-$SiO_2/Si$ structures to investigate the thermal stability of nickel silicides formed by rapid thermal annealing(RTA) of the temperature of $300{\sim}1100^{\circ}C$ for 40 seconds. We employed for a four-point tester, field emission scanning electron microscope(FE-SEM), transmission electron microscope(TEM), high resolution X-ray diffraction(HRIXRD), and scanning probe microscope(SPM) in order to examine the sheet resistance, in-plane microstructure, cross-sectional microstructure evolution, phase transformation, and surface roughness, respectively. The silicide on 30 nm polysilicon substrate was stable at temperature up to $900^{\circ}C$, while the one on 70 nm substrate showed the conventional $NiSi_2$ transformation temperature of $700^{\circ}C$. The HRXRD result also supported the existence of NiSi-phase up to $900^{\circ}C$ for the Ni silicide on the 30 nm polysilicon substrate. FE-SEM and TEM confirmed that 40 nm thick uniform silicide layer and island-like agglomerated silicide phase of $1{\mu}m$ pitch without residual polysilicon were formed on 30 nm polysilicon substrate at $700^{\circ}C\;and\;1000^{\circ}C$, respectively. All silicides were nonuniform and formed on top of the residual polysilicon for 70 nm polysilicon substrates. Through SPM analysis, we confirmed the surface roughness was below 17 nm, which implied the advantage on FUSI gate of CMOS process. Our results imply that we may tune the thermal stability of nickel monosilicide by reducing the height of polysilicon gate.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.4
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• pp.27-36
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• 2006

We fabricated thermally evaporated 10 nm-Ni/(poly)Si, 10 nm-Ni/l nm-Ir/(poly)Si and 10 nm-Ni/l nm-Pt/(poly)Si films to investigate the thermal stability of nickel monosilicides at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides of 50 nm-thick were formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to examine sheet resistance. A scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An X-ray diffractometer and an Auger depth profiler were used for phase and composition analysis, respectively. Nickel silicides with platinum have no effect on widening the NiSi stabilization temperature region. Nickel silicides with iridium farmed on single crystal silicon showed a low resistance up to $1200^{\circ}C$ while the ones formed on polycrystalline silicon substrate showed low resistance up to $850^{\circ}C$. The grain boundary diffusion and agglomeration of silicides lowered the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.2
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• pp.195-200
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• 2007

We fabricated thermally-evaporated 10 nm-Ni/70 w-Poly-Si/200 $nm-SiO_2/Si$ and $10nm-Ni_{0.5}Co_{0.5}/70$ nm-Poly-Si/200 $nm-SiO_2/Si$ structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required fur annealing. Silicides underwent rapid anneal at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of the polycrystalline silicon substrate mimicking the gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profile scope were employed for the determination of cross sectional microstructure and thickness. 20nm thick nickel cobalt composite silicides on polycrystalline silicon showed low resistance up to $900^{\circ}C$, while the conventional nickle silicide showed low resistance below $900^{\circ}C$. Through TEM analysis, we confirmed that the 70nm-thick nickel cobalt composite silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. We identified $Ni_3Si_2,\;CoSi_2$ phase at $700^{\circ}C$ using an X-ray diffractometer. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo composite silicide from NiCo alloy films process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.6
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• pp.1056-1063
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• 2006

Thermal evaporated 10 nm-Ni/l nm-Ir/(or polycrystalline)p-Si(100) and 10 nm-$Ni_{50}Co_{50}$/(or polycrystalline)p-Si(100) films were thermally annealed using rapid thermal annealing fur 40 sec at $300{\sim}1200^{\circ}C$. The annealed bilayer structure developed into Ni(Ir or Co)Si and resulting changes in sheet resistance, microstructure, phase and composition were investigated using a four-point probe, a scanning electron microscopy, a field ion beam, an X-ray diffractometer and an Auger electron spectroscope. The final thickness of Ir- and Co-inserted nickel silicides on single crystal silicon was approximately 20$\sim$40 nm and maintained its sheet resistance below 20 $\Omega$/sq. after the silicidation annealing at $1000^{\circ}C$. The ones on polysilicon had thickness of 20$\sim$55 nm and remained low resistance up to $850^{\circ}C$. A possible reason fur the improved thermal stability of the silicides formed on single crystal silicon substrate is the role of Ir and Co in preventing $NiSi_2$ transformation. Ir and Co also improved thermal stability of silicides formed on polysilicon substrate, but this enhancement was lessened due to the formation of high resistant phases and also a result of silicon mixing during high temperature diffusion. Ir-inserted nickel silicides showed surface roughness below 3 nm, which is appropriate for nano process. In conclusion, the proposed Ir- and Co- inserted nickel silicides may be superior over the conventional nickel monosilicides due to improved thermal stability.