• Proceedings of the Korea Society of Design Studies Conference
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• 1999.10a
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• pp.34-35
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• 1999

컴퓨터 기술을 활용한 하이테크 제품의 도래는 생활에 많은 편리함을 안겨 주었지만, 제품을 조작하는 사용자들에게 '사용의 어려움'이라는 새로운 문제를 초래하게 되었다. 과거의 많은 사용자들은 제품의 구성들을 단지 봄으로써 그것이 어떻게 작동할 것이라는 것을 인지할 수 있었지만, 현재에 많은 하이테크 제품의 작동 부분들은 그 기능들이 제품 내부의 마이크로칩 속에 내장됨으로서 형태만으로 그 기능들의 용도를 이해하기란 매우 어려운 문제가 되었다.(중략)

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.4
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• pp.120-126
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• 1989

IC chip layout pattern recognition algorithms using image processing techniques are being developed for the automation of manufacturing and inspecting chips. Recognitioin of chip pattern requires feature extraction from nach rrame of chip image adn needs to match the feature data through all frames. In this paper, vertex position and form having layout information are extracted by the feature straightening algorithm, and global coordinates of layout pattern are extracted by the feature straightening algorithm, and global coordinates of layout pattern are obtainnd by vertex form matching from the overlapped area of neighbour frame.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.10
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• pp.758-765
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• 2018

This paper presents a 24-GHz frequency-modulated continuous wave(FMCW) radar transceiver with two Rx and one Tx channels in 65-nm complementary metal-oxide-semiconductor(CMOS) process and implemented it on a radar system using the developed transceiver chip. The transceiver chip includes a $14{\times}$ frequency multiplier, low-noise amplifier, down-conversion mixer, and power amplifier(PA). The transmitter achieves >10 dBm output power from 23.8 to 24.36 GHz and the phase noise is -97.3 GHz/Hz at a 1-MHz offset. The receiver achieves 25.2 dB conversion gain and output $P_{1dB}$ of -31.7 dBm. The transceiver consumes 295 mW of power and occupies an area of $1.63{\times}1.6mm^2$. The radar system is fabricated on a low-loss Duroid printed circuit board(PCB) stacked on the low-cost FR4 PCBs. The chip and antenna are placed on the Duroid PCB with interconnects and bias, gain blocks and FMCW signal-generating circuitry are mounted on the FR4 PCB. The transmit antenna is a $4{\times}4$ patch array with 14.76 dBi gain and receiving antennas are two $4{\times}2$ patch antennas with a gain of 11.77 dBi. The operation of the radar is evaluated and confirmed by detecting the range and azimuthal angle of the corner reflectors.

• Journal of Digital Convergence
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• v.14 no.4
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• pp.419-424
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• 2016

In this paper, we studied a light distribution for the LED chips arrangement using an optical design software. The structures of the edge type LED luminaires are reflector plane, LGP(lighting guide plane) and diffuse plane. The reflector plane is on the middle of the overall structure. We had simulation that placing LED chips on the reflector center of the reflector edge by changing the position of LED chips above the reflector center at 1mm, 2mm, and 3mm respectively. In the case, when LED chips are on the center of the reflector, it shows the light distribution of the general diffuse illumination, the semi-direct distribution with 0.56 efficiency and the direct distribution with 0.31 efficiency. And the wedge type LGP shows more efficiency than the flat type. Gradually increasing shape of semi-spherical type by 0.015mm has power of 1.02W, efficiency of 0.25, and maximum luminous intensity of 0.104W/sr, it also and shows the better optical characteristics than the reflector plane that have no patterns. This semi-spherical type shows the better optical characteristics than the reflector plane that have no patterns.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.1 no.1
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• pp.47-52
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• 2008

In this paper, the small PIFA with dual bandwidth using LTCC is the proposed. The proposed PIFA is designed and fabricated for dual resonance bands (K-PCS and WiBro). It consists of two layers. The bottom layer shape PIFA has 120MHz bandwidth (1.727 ~ 1.847 GHz), it satisfied K-PCS. The top layer shape stacked element has 110MHz bandwidth (2.302 ~ 2.412 GHz), it satisfied WiBro. The top layer is stacked on the bottom layer for electric coupling. Maximum radiation gain of K-PCS, WiBro bands are 2.11 dBi, 3.71 dBi respectively. For miniaturization of the antenna structure, the PIFA using LTCC ( ${\varepsilon}_r\;=\;8$ ) chip is fabricated. The proposed PIFA shows the effect of SAR reduction also. A defect that is fabricated by stacking up the layers in the design of PIFA is complemented by fabricated in using LTCC chip.

• Journal of the Society of Cosmetic Scientists of Korea
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• v.30 no.4 s.48
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• pp.479-483
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• 2004

An attempt was made to develop a proteinchip for screening of MITF (microphthalmia transcription factor) inhibitor. Binding of MITF to E-box causes transcription of several pigmenting genes including tyrosinase gene. We investigated binding of MITF and its DNA binding site (E-box) using a protein-DNA chip with various detection methods including flurorescence (Cyt3). SPR (surface plasmon resonance) and SPRi (surface plasmon resonance imaging). A fusion protein (MITF-Maltose Binding Protein) was attached on the glass plate by chemical modification. An inhibitory synthetic DNA oligomer, artificially designed based on the E-box sequence, inhibited the binding of MITF and E-box. These results showed the potentials of flurorescence-based MITF protein chip as a microarray for high throughput screening (HTS) system of depigmenting agents.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.9
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• pp.930-935
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• 2009

This paper describes a miniaturezed metamaterial BT chip antenna for mobile devices. The size of the proposed antenna is $3.0\;mm(W){\times}2.0\;mm(L){\times}1.2\;mm(H)$. And it is fabricated by chip type. The zeroth-order resonant properties are analyzed by magnitude and phase distributions of the surface current using surface current scanning system. The antenna offers omni-directional radiation patterns and measured 3D average gain is over - 1.7 dBi.

• KSBB Journal
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• v.22 no.4
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• pp.260-264
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• 2007

Peptides are frequently studied as candidates for new drug development. Recently, synthesized peptide library is screened for a certain functionality on a microarray biochip format. In this study, in order to replace the conventional cellulose membrane with glass for a microarray chip substrate for peptide library screening, we modified the glass surface from amines to thiols and covalently immobilized the peptides. Using trypsin-FITC (fluorescein isothiocyanate) conjugate that could specifically bind to a trypsin binding domain consisting of a 7-amino acid peptide, we checked the degree of surface modification. Because of the relatively lower hydrophilicity and reduced surface roughness, the conjugation reaction to the glass required a longer reaction time and a higher temperature. It took approximately 12 hr for the reaction to be completed. From the fluorescence signal intensity, we could differentiate between the target and the control peptides. This difference was confirmed by a separate experiment using QCM. Furthermore, a smaller volume and higher concentration of a spot showed a higher fluorescence intensity. These data would provide the basic conditions for the development of microarray peptide biochips.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.10
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• pp.31-39
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• 2004

This paper illustrates the noise characteristics under chip's core operations according to types of packages and modules for DDR DRAM For analyzing this, the impedance profiles and power noises are analyzed with DRAM chips having commercial TSOP package and commercial FBGA package on TSOP-based DIMM and FBGA-based DIMH In controversy with common concepts, we find that the noise-isolation characteristics of FBGA package are more weak and sensitive on transferred noises than those of the TSOP package. In addition, the simulated results show that the decoupling capacitor locations of modules are more important to control the self and transfer noise characteristics than the lead inductance of the packages. Therefore, satisfying the target spec of the noise suppression and isolation can be achieved through the design of power distribution systems only with considering not only the package types but also the whole module system.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.22 no.1
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• pp.327-332
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• 2021

At the package level, semiconductor reliability inspections involves mounting a semiconductor chip package on a test socket. The form of the test socket is basically determined by the form of the chip package. It also acts as a medium to connect with test equipment through mechanical contact of the leads and socket leads in the chip package, and it minimizes signal loss in a signal transmission process so that an inspection signal can be delivered well to the semiconductor. In this study, a technique was applied to examine the interdependence of adjacent electrical transfer routes and the structure of adjacent electrical transfer paths. The goal was to enable short-circuit testing of fewer than 100 silicon test sockets through a single interface for life tests and precision measurements. The test results of the developed device show a test precision of 99% or more and a simultaneous test speed characteristic of 0.66 sec or less.