• Proceedings of the Korea Association of Crystal Growth Conference
• /
• 1996.06b
• /
• pp.281-283
• /
• 1996

전자제품의 경박 단소화에 필수 부품인 칩저항기, HIC 등의 제조 기술은 급속한 성장을 이룬 반면에 가장 중요한 특성을 발현하는 전극 재료 및 저항 재료의 제조는 기술적으로 취약한 부분이다. RuO2와 Pb2Ru2O5.5는 저항 페이스트의 가장 중요한 원재료로서 저항 편차, 온도저항계수(TCR), 전압저항계수(VCR), NOISE 등의 전기적 특성과 페이스트이 흐름성, 보존 안정성 등의 작업성에 큰 영향을 미친다. 외국에서 산화 루테늄 분말 제조에 대한 많은 연구가 진행되어 오고 있으나 대부분 출발 물질을 염화 루테늄을 사용하여 RuO2 분말을 제조하고 있다. 이렇게 제조된 RuO2 분말은 전자 재료에 악영향을 미치는 염소이온이 잔류할 가능성이 높다. 본 연구에서는 Ru metal에서 루테늄산염을 만들어 위의 문제를 최소화 하였고, 전기적 특성이 우수한 고분산 초미립의 RuO2를 얻기 위해 산화, 환원, 정제, 배소 등의 제조 공정에 있어서 최적 조건을 고찰 하였다.

• Journal of the Microelectronics and Packaging Society
• /
• v.15 no.2
• /
• pp.37-45
• /
• 2008

In this study, reliabilities of Cu (60 um)/SnAg (20 um) double-bump flip chip assemblies were investigated for the flip chip interconnections on organic substrates with 100 um pitch. After multiple reflows at $250^{\circ}C\;and\;280^{\circ}C$, bump contact resistances were almost same regardless of number of reflows and reflow temperature. In the high temperature storage test, there was no bump contact resistance change at $125^{\circ}C$ up to 2000 hours. However, bump contact resistances slightly increased at $150^{\circ}C$ due to Kirkendall voids formation. In the electromigration test, Cu/SnAg double-bump flip chip assemblies showed no electromigration until about 600 hours due to reduced local current density. Finally, in the thermal cycling test, thermal cycling failure mainly occurred at Si chip/Cu column interface which was found out the highest stress concentration site in the finite element analysis. As a result, Al pad was displaced out under thermal cycling. This failure mode was caused by normal compressive strain acting Cu column bumps along perpendicular direction of a Si chip.

• Journal of the Microelectronics and Packaging Society
• /
• v.26 no.4
• /
• pp.47-53
• /
• 2019

Stiffness-gradient stretchable electronic packages of the soft PDMS/hard PDMS/PTFE structure were processed using the polydimethylsiloxane (PDMS) as the base substrate and the more stiff polytetrafluoroethylene (PTFE) as the island substrate, and their stretchable deformation-resistance characteristics were characterized. The flip-chip joints, formed by bonding the chip bumps of 50 ㎛-diameter onto the PDMS/PTFE substrate pads, exhibited an average contact resistance of 96 mΩ. When the stretchable package of the soft PDMS/hard PDMS/PTFE structure was deformed to 30% elongation, the strain on the PTFE was restrained to 1%, resulting in a negligible resistance increase of 1% in the daisy-chain circuit formed on the PTFE island substrate. The circuit resistance increased for 1.7% after 2,500 cycles of 0~30% stretchable deformation.

• Journal of the Microelectronics and Packaging Society
• /
• v.19 no.3
• /
• pp.71-76
• /
• 2012

A chip interconnection technology for smart fabrics was investigated by using flip-chip bonding of SnBi low-temperature solder. A fabric substrate with a Cu leadframe could be successfully fabricated with transferring a Cu leadframe from a carrier film to a fabric by hot-pressing at $130^{\circ}C$. A chip specimen with SnBi solder bumps was formed by screen printing of SnBi solder paste and was connected to the Cu leadframe of the fabric substrate by flip-chip bonding at $180^{\circ}C$ for 60 sec. The average contact resistance of the SnBi flip-chip joint of the smart fabric was measured as $9m{\Omega}$.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.13 no.10
• /
• pp.4757-4761
• /
• 2012

LED chip on board(COB) package has been fabricated using aluminum substrate and aluminum anodization process. An alumina layer, used as a dielectric in COB substrate, is produced on aluminum substrate by selective anodization process. Also, selective anodization process makes it possible to construct a thermal via with a fully-filled via hole. Two types of the COB package are fabricated in order to analyze the effects of their substrate types on thermal resistivity and luminous efficiency. The aluminum substrate with the thermal via shows more improved measurement results compared with the alumina substrate. These results demonstrate that selective anodization process and thermal via can increase heat dissipation of COB package in this work. In addition, it is proved experimentally that these parameters also can be enhanced using efficient layout of multiple chip in the COB package.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.3
• /
• pp.83-92
• /
• 2004

In this thesis, a modified interpolation-2 6-bit 70MHz ADC is proposed minimizing chip area and power consumption, which includes an error correction circuit. The conventional flash ADC without interpolation comparators suffers from large chip area and more power consumption due to 2n resistors and 2n-1 comparators. Although the flash ADC with interpolation-4 comparators has small area, SNR, INL and DNL are degraded by comparison with the interpolation -2 comparator. We fabricated the proposed 6-bit ADC with interpolation-2 comparators using 0.18${\mu}{\textrm}{m}$ CMOS process. The ADC is composed of 32-resistors, 31 comparators, amplifiers, latches, error correction circuit, thermometer code detector and encoder As the results, power consumption is reduced to 40mW at 3.3V which is saving about 50% than a flash ADC without interpolation comparators, and area is reduced by 20%. SNR is increased by 75% in comparison with that of a flash ADC with interpolation-4 comparators.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2009.06a
• /
• pp.178-178
• /
• 2009

전자제품의 고속화, 고집적화, 고성능이 요구되어짐에 따라 IC's 성능 향상을 통해 패키징 기술의 소형화를 필요로 하고 있어 소재나 칩 부품을 이용해 커패시터나 저항을 구현하여 내장시키는 임베디드 패시브 기술에 대한 연구가 많이 진행되어 지고 있다. 본 연구에서는 3D 패키징이 가능한 flexible 소재에 능, 수동 소자를 내장하기 위한 다층 flexible 기판 공정 기술에 대한 연구를 수행하였다. 기판제작을 위해 flexible 소재에 미세 형성이 가능한 폴리머 필름을 접착하였고 flexible 위에 후막 저항체 패턴을 퍼|이스트를 이용하여 형성하였다. 또한, 능동소자 내장을 위해 test chip을 제작하여 플립칩 본더를 이용해 flexible 기판에 접합한 후에 bonding film을 이용한 build up 공정을 통해 via를 형성하고 무전해 도금 공정을 거쳐 전기적인 연결을 하였다. 위의 공정을 통해 앓고 가벼울 뿐만 아니라 자유롭게 구부러지는 특성을 갖고 있는 능, 수동 소자 내장형 flexible 기판의 변형에 따른 전기적 특성을 평가하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.315-315
• /
• 2010

휴대용 전자 기기는 얇고 가벼우면서 빠른 대용량을 처리하는 속도와 다기능이 필요한 추세로 가고 있다. 기기 크기가 작아짐에 따라서 내장 되는 칩 또한 소형화, 고집적화, 고성능화가 요구되므로 이에 상응하는 발전된 패키징 기술이 필요하게 되었고, 이에 대응하기위해서 embedded components device 패키징 기술이 필요로 하게 되었다. 본 연구에서는 $21{\Omega}$ 의 저항 값을 갖는 1005 수동 소자를 prepreg를 이용하여 PCB기판에 내장 한 후 micro via를 이용하여 무전해 구리 도금으로 전기적인 연결을 하여 기판을 제작하였다. 제작되어진 기판으로 Reflow, Aging 테스트 후 칩과 계면간의 금속화합물 반응을 관찰하였다. 또한 Reflow외 시효처리를 끝마친 기판을 사용하여 drop test를 실시한 후 fail 발생 시 저항 값의 변화와 접합부의 미세조직을 관찰하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.11 no.8
• /
• pp.1322-1328
• /
• 2000

This paper presents the characteristics of complex antenna factors of monopole antenna for the measuring time-domain fields above the ground plane. The method of moments with Galerkin's procedure is used to determine the current distribution of the antenna. The monopole antenna with chip resistor is discussed to reduce the reflection at low frequencies. Numerical results show that the magnitude of the complex antenna factor for the monopole with chip resistor is 5.6 dB as large as that of the conventional monopole antenna. The characteristics of the modified complex antenna factor to use the antenna factor are also treated at low frequencies. To verify the theoretical analysis, experimental results are compared with theoretical ones.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.8 no.3
• /
• pp.447-452
• /
• 2013

In this paper, the leakage current detection and auto shut-off module for a concent has been developed. Existing leakage current detection modules are detecting resistive leakage current, using a resistive leakage current detection chip but the proposed leakage current detection module separates and detects resistive leakage current in the synthesis leakage current by only programming in a power processor MCU(MSP430). The module implemented by proposed method has early detection and auto shut-off feature at more than resistive leakage current 5mA, and has the advantage of easily adjusting resistive leakage current less or more than 5mA, because of resistive leakage current detection function being implemented by a program in MCU.