• Proceedings of the Korean Society of Computer Information Conference
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• 2021.07a
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• pp.343-345
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• 2021

본 논문에서는 4D 프린팅을 이용한 인공장기이식에 대해 소개한다. 여러 외부적 요인에 대처할 수 없었던 3D 바이오 프린팅의 단점을 보완하여 자가변환 및 자가조립이 가능한 재료를 3D프린터로 찍어낸 다음, 그 물체가 주변환경에 의해 스스로 모양이 변화하는 기술인 4D 프린팅을 이용한다. 또한, 4D 프린팅은 변형이 가능한 특수 소재를 사용함으로써 시간이 지나면 출력한 결과물의 모양이 변하게 되고, 시간 및 온도·습도·압력 등의 외부적인 요인에 스스로 능동적으로 대처할 수 있다. 본 논문에서는 4D 프린팅 기술로 제작한 작은 인공장기를 인체에 삽입함으로써 수술 후 감염 및 합병증 등의 부작용을 최소화할 수 있고 수술 시간을 크게 단축할 수 있다는 면에서 우수함을 보인다.

• Annual Conference of KIPS
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• 2022.05a
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• pp.610-613
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• 2022

센서 데이터의 중요성이 커지면서 센서 데이터 처리 연구의 수요가 증가하고 있다. 센서 데이터 기반의 딥러닝 모델 개발 시, 센서 데이터 단일 값에 의한 출력이 아닌 시계열적인 특성을 반영하여 연속적인 데이터 간의 연관성을 파악할 수 있는 슬라이딩 윈도우 기법을 통해 효율적으로 데이터를 분석하고 처리할 수 있다. 하지만, 기존의 방법들은 학습 성능(학습 시간 및 모델 성능)에 미치는 영향을 평가하는 기준 없이 입력 데이터의 윈도우 사이즈를 임의로 설정하여 데이터를 처리해 왔다. 따라서, 본 논문은 학습 시간과 모델 성능을 기준으로 센서 데이터의 윈도우 사이즈 최적화 기법을 제안한다. 제안한 방법은 전류를 이용하여 스위치와 다이오드 온도를 추정하는 가상 센서(virtual sensor) 실험 테스트베드에 적용하여, 학습 시간 중심으로는 5%의 윈도우 사이즈를, 모델 성능 중심으로는 R2 SCORE 의 값을 0.9295 로 갖는 8%의 윈도우 사이즈가 최적으로 도출되었다.

• Annual Conference of KIPS
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• 2024.05a
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• pp.741-744
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• 2024

본 연구에서는 음성 전처리 기법인 푸리에 변환의 높은 시간 복잡도로 인해 많은 계산 자원을 요구한다는 단점을 보완하기 위한 FTAE(Fourier Transform Auto Encoder)를 설계하고 구현한다. FTAE는 음성 데이터를 입력으로 받아 Early Fusion 특징맵을 출력하도록 설계된 오토인코더 기반 신경망이다. 학습 결과 FTAE의 최종 Training Loss는 0.1479를 나타냈다. 기존 푸리에 변환 기반 Early Fusion 방법과의 성능 비교 실험 결과 FTAE 방법은 Accuracy 0.905, F1-Score 0.905, 탐지 소요 시간 17초의 성능을 보였다. FTAE 방법은 Early Fusion 방법에 비해 Accuracy와 F1-Score는 0.065 하락했지만, 탐지 소요 시간은 약 72배 빠른 결과를 보여주었다.

• Journal of Bio-Environment Control
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• v.20 no.2
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• pp.63-71
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• 2011

Pattern recognition of a cucumber were conducted to detect directly the binary images by using thresholding method, which have the threshold level at the optimum intensity value. By restricting conditions of learning pattern, output patterns could be extracted from the same and similar input patterns by the algorithm. The algorithm of pattern recognition was developed to determine the position of the cucumber from a real image within working condition. The algorithm, designed and developed for this project, learned two, three or four learning pattern, and each learning pattern applied it to twenty sample patterns. The restored success rate of output pattern to sample pattern form two, three or four learning pattern was 65.0%, 45.0%, 12.5% respectively. The more number of learning pattern had, the more number of different out pattern detected when it was conversed. Detection of feature pattern of cucumber was processed by using auto scanning with real image of 30 by 30 pixel. The computing times required to execute the processing time of cucumber recognition took 0.5 to 1 second. Also, five real images tested, false pattern to the learning pattern is found that it has an elimination rate which is range from 96 to 98%. Some output patterns was recognized as a cucumber by the algorithm with the conditions. the rate of false recognition was range from 0.1 to 4.2%.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.2
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• pp.3-10
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• 2008

The choice of basis for representation of element in $GF(2^m)$ affects the efficiency of a multiplier. Among them, a multiplier using redundant representation efficiently supports trade-off between the area complexity and the time complexity since it can quickly carry out modular reduction. So time of a previous multiplier using redundant representation is faster than time of multiplier using others basis. But, the weakness of one has a upper space complexity compared to multiplier using others basis. In this paper, we propose a new efficient multiplier with consideration that polynomial exponentiation operations are frequently used in cryptographic hardwares. The proposed multiplier is suitable fer left-to-right exponentiation environment and provides efficiency between time and area complexity. And so, it has both time delay of $T_A+({\lceil}{\log}_2m{\rceil})T_x$ and area complexity of (2m-1)(m+s). As a result, the proposed multiplier reduces $2(ms+s^2)$ compared to the previous multiplier using equally-spaced polynomials in area complexity. In addition, it reduces $T_A+({\lceil}{\log}_2m+s{\rceil})T_x$ to $T_A+({\lceil}{\log}_2m{\rceil})T_x$ in the time complexity.($T_A$:Time delay of one AND gate, $T_x$:Time delay of one XOR gate, m:Degree of equally spaced irreducible polynomial, s:spacing factor)

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.2
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• pp.123-128
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• 2020

A low phase noise phase locked loop (PLL) with negative feedback loop including frequency variation sensing circuit (FVSC) has been proposed. The FVSC senses the frequency variation of voltage controlled oscillator output signal and controls the volume of electric charge in loop filter capacitance. As the output frequency of the phase locked loop increases, the FVSC reduces the loop filter capacitor charge. This causes the loop filter output voltage to decrease, resulting in a phase locked loop output frequency decrease. The added negative feedback loop improves the phase noise characteristics of the proposed phase locked loop. The size of capacitance used in FVSC is much smaller than that of loop filter capacitance resulting in no effect in the size of the proposed PLL. The proposed low phase noise PLL with FVSC is designed with a supply voltage of 1.8V in a 0.18㎛ CMOS process. Simulation results show the jitter of 273fs and the locking time of 1.5㎲.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.669-676
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• 2012

In this paper, The method to improve the mass production method of the radar sensor is suggested by using the temperature compensation circuit which is composed with the thermister. The mass production became easier by decreasing the adjustment time for the exact oscillation frequency with the temperature compensation circuit that can support the proper gate bias voltage for the FET after the dielectric resonator is removed from the DRO(Dielectric Resonator Oscillator) of the radar sensor. Radar sensor with the proposed method has 15.67MHz oscillator frequency variation in the temperature range of $-20^{\circ}C-+55^{\circ}C$, 0.65dB magnitude variation, -105.47dBc phase noise characteristics at 1MHz which are better or similar temperature characteristics with the DRO whose oscillator frequency variation is 25MHz, magnitude variation is 0.42dB and phase noise is -107.40dBc in the same temperature range.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.12
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• pp.2410-2416
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• 2016

Recently, most countries in the world have pursued a denuclearization. So it has been of interest to increase to Nuclear weapon in such as North Korea's continued nuclear test. Pulsed gamma rays produced in the nuclear explosion and the space environment can give the big damage to the electronic device in a very short period of time. To confirm the extent of damage of these electronic devices, pulsed gamma irradiation facility that can occur in nuclear weapon or space environment are required. In this paper, we implemented the pulsed gamma-ray detection module and analyzed output of the irradiation test. We have experimented using an electron beam accelerator research facilities in Pohang Accelerator similar conditions to equip and Nuclear weapon. As a result, we confirmed that the pulsed gamma rays emitted by the gamma radiation and electron beam conversion device. The results of this paper will contribute to improve the reliability and accuracy of studies for utilizing pulsed gamma rays.

• The Journal of the Acoustical Society of Korea
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• v.15 no.5
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• pp.82-89
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• 1996

Application fields of ultrasonic transducers can be divided into two categories, a high ultrasonic resolution required field and a high ultrasonic power required field. This paper is aimed to determine the optimal properties of the matching layers of the transducer for each of the applications. Further, it is aimed to optimize the properties of the matching layers that show satisfactory performances for both of the application fields. Through the direct time domain analysis of the transmission and reflection behavior of the ultrasonic wave, apart from the conventional equivalent circuit analysis, and Fourier transformation of its results, we found the optimum acoustic impedances of the matching layers. The newly determined layers provide much better transducer performance-57% at most-than those obtained with conventional design methods. Based on the results, we also found the optimal acoustic impedances of the layers good for both of the application fields. For te optimization, we developed a new transducer performance evaluation parameter that can be applied to any type of ultrasonic transducers.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.12
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• pp.14-21
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• 2009

In this paper, a Ka-band 10 W power amplifier module with seven power MMIC bare dies is designed and fabricated using MIC technology which combines multiple MMIC chips on a thin film substrate. Modified Wilkinson power dividers/combiners and CBFGCPW-Microstrip transitions for suppressing resonance and reducing connection loss are utilized for high-gain and high-power millimeter wave modules. A new TTL pulse timing control scheme is proposed to improve output power degradation due to large bypass capacitors in the gate bias circuit. Pulse-mode operation time is extended more than 200 nsec and output power increase of 0.62 W is achieved by applying the proposed scheme to the Ka-band 10 W power amplifier module operating in the pulsed condition of 10 kHz and $5\;{\mu}sec$. The implemented power amplifier module shows a power gain of 59.5 dB and an output power of 11.89 W.