• Korean Journal of Optics and Photonics
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• v.13 no.4
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• pp.295-300
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• 2002

We developed an optical transmitter and receiver for an electrical time division multiplexed (ETDM) 20 Gb/s optical transmission system, and experimentally investigated their characteristics. Especially, the clock extraction circuit, which is a key component in realizing broadband optical transmission receivers, was realized by using an NRZ-to-PRZ converter implemented with a half-period delay line and an EX-OR, a high-Q bandpass filter using a cylindrical dielectric resonator, and a microstrip coupled-line bandpass filter. Finally, the bit-error-rate of demultiplexed 10 Gb/s electrical signal after back to-back transmission was measured, and a high receiver sensitivity [-26.2 dBm for NRZ ($2^{7}-1$) pseudorandom binary sequence (PRBS)] was obtained

• Journal of Korea Multimedia Society
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• v.13 no.7
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• pp.943-949
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• 2010

This paper presents some improvements on VLSI implementation of lifting-based 9/7 wavelet transform by optimization hardware multiplication. The proposed solution requires less logic area and power consumption without performance loss compared to previous wavelet filter structure based on lifting scheme. This paper proposes a better approach to the hardware implementation using Lefevre algorithm based on extensions of Pattern search methods. To compare the proposed structure to the previous solutions on full multiplier blocks, we implemented them using Verilog HDL. For a hardware implementation of the two solutions, the logical synthesis on 0.18 um standard cells technology show that area, maximum delay and power consumption of the proposed architecture can be reduced up to 51%, 43% and 30%, respectively, compared to previous solutions for a 200 MHz target clock frequency. Our evaluation show that when design VLSI chip of lifting-based 9/7 wavelet filter, our solution is better suited for standard-cell application-specific integrated circuits than prior works on complete multiplier blocks.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.4
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• pp.264-274
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• 2003

This paper presents a direct generalized minimum-variance self tuning controller with a PID structure using neural network which adapts to the changing parameters of the nonlinear system with nonminimum phase behavior, noises and time delays. The self-tuning controller with a PID structure is a combination of the simple structure of a PID controller and the characteristics of a self-tuning controller that can adapt to changes in the environment. The self-tuning control effect is achieved through the RLS (recursive least square) algorithm at the parameter estimation stage as well as through the Robbins-Monro algorithm at the stage of optimizing the design parameter of the controller. The neural network control effect which compensates for nonlinear factor is obtained from the learning algorithm which the learning error between the filtered reference and the auxiliary output of plant becomes zero. Computer simulation has shown that the proposed method works effectively on the nonlinear nonminimum phase system with time delays and changed system parameter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.4
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• pp.645-651
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• 2009

In this paper, we present bit error rate(BER) performance of an adaptive decision feedback equalizer(DFE) using experimental data. The experiment was performed at the shore of Geoje in November 2007. The BER of the adaptive DFE whose tap weight is updated by RLS is described with change of feedforward filter length, feedback filter length, training sequence length, and delay, which shows that the uncoded average BER is $4{\times}10^2\;and\;1.5{\times}10^{-2}$ with transmission range of 9.7km and 4km, respectively. The BER of the adaptive DFE can be lower than 10-3 by a forward error correction code and therefore the adaptive DFE may be a good candidate for a high speed AUV communications since the volume and weight of the underwater acoustic modem should be small because of the restricted space and power in the battery-operated AUV.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.5C
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• pp.534-539
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• 2006

In this paper, we propose a new frame prediction filtering technique and a hardware(H/W) architecture for scalable video coding. We try to evaluate MCTF(motion compensated temporal filtering) and hierarchical B-picture which are a technique for eliminate correlation between video frames. Since the techniques correspond to non-causal system in time, these have fundamental defects which are long latency time and large size of frame buffer. We propose a new architecture to be efficiently implemented by reconfiguring non-causal system to causal system. We use the property of a repetitive arithmetic and propose a new frame prediction filtering cell(FPFC). By expanding FPFC we reconfigure the whole arithmetic architecture. After the operational sequence of arithmetic is analyzed in detail and the causality is imposed to implement in hardware, the unit cell is optimized. A new FPFC kernel was organized as simple as possible by repeatedly arranging the unit cells and a FPFC processor is realized for scalable video coding.

• Journal of Broadcast Engineering
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• v.15 no.5
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• pp.697-702
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• 2010

Contour artifact is known as the unintentional result of quantizing a flat area that has smooth gradients. In this letter, a decontouring algorithm is proposed to efficiently remove false contours that occur in typical block-based video coding applications. First, the algorithm goes through a refinement stage to determine candidate blocks probably having noticeable false contours with different kinds of features in a block. Then, pseudo-random noise masking is applied to those blocks to mitigate the contour artifacts. This block-based selective decontouring can efficiently remove the unnecessary processing of those blocks that have no false contour, which incidentally ensures a minor penalty in visual quality and computational complexity. The proposed algorithm was demonstrated, integrated into H.264/AVC, that visual quality can be significantly enhanced with an ignorable rate-distortion (RD) loss and an minor increase in computational complexity.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.6
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• pp.584-591
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• 2000

Power Quality Compensator(PQC) has been installed to protect the sensitive loads against the voltage disturbances, such as voltage sag and interruption. In general, static switch is used for the purpose of link between utility and PQC. So transfer operation of the static switch play a important part in the PQC. Many studies on the structure and control of PQC have been progressed in active, but these researches have been rarely mentioned about any voltage-disturbances-detection method to start the PQC operation. In this paper, a new voltage-disturbances-detection algorithm for computer application loads using the CBEMA/ITIC curve is proposed for transfer operation of the static switch. The proposed detection algorithm is implemented to get fast detecting time through the comparison of instantaneous 3-phase voltage values transferred to DC values in the synchronous reference frame with the operating reference values. To get the robust characteristics against the noise, a first order digital filter is designed. The magnitude falling and phase delay caused by the filter are compensated through the error normalizing and numerical analysis using transfer function, respectively. Finally, the validity of the proposed algorithm is proved by ACSL simulation and experimental results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.8B
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• pp.1493-1498
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• 2000

In this paper, we introduce a modified interference cancellation scheme to overcome MAI in DS-CDMA. Among ICs(Interference Cancellers), PIC(Parallel IC) requires the more complexity, and SIC(Successive IC) faces the problems of the long delay time. Most of all, the adaptive detector achieves the good BER performance using the adaptive filter conducted iteration algorithm. so it requires many iterations. To resolve the problems of them, we propose an improved adaptive detector that the received signal removed MAI through the sorting scheme and the cancellation method are fed into the adaptive filter. Because the improved input signal is fed into the adaptive filter, it has the same BER performance only using smaller iterations than the conventional adaptive detector, and the proposed detector having adaptive filter requires less complexity than the other detectors.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.2 no.2
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• pp.71-76
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• 1992

Piezoceramic filters were fabricated by adding $MnO_2 and FeZ0_3$ to the $0.05Pb(Al_{2/3}W_{1/3})O_3-0.95Pb(Zr_{0.52}Ti0.48)O_3$ system using photolithography method. As the amounts of $MnO_2$ increased, the electro-mechanical coupling factor(Kp) decresed. On the other hand, for $Fe_2O_3$ added samples, Kp was 57%, but mechanical quality factor(Qm) showed relatively low value. The passband widths were 155kHz for 0.3wt % $MnO_2$ addition and 260kHz for 0.1 wt % $Fe_2O_3$ addition, and were inversely propotional to Qm values. Group delay time characteristics showed Gausian for $MnO_2$ additions and Butterworth for$Fe_2O_3$ additions.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.434-437
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• 2010

NIPS(Network Intrusion Prevention System) is in line at the end of the external and internal networks which performed two kinds of action: Signature-based filtering and anomaly detection and prevention-based on self-learning. Among them, a signature-based filtering is well known to defend against attacks. By using signature-based filtering, intrusion prevention system passing a payload of packets is compared with attack patterns which are signature. If match, the packet is discard. However, when there is packet delay, it will increase the required pattern matching time as the number of signature is increasing whenever there is delay occur. Therefore, to ensure the performance of IPS, we needed more efficient pattern matching algorithm for high-performance ISP. To improve the performance of pattern matching the most important part is to reduce the number of comparisons signature rules and the packet whenever the packets arrive. In this paper, we propose an improve signature hashing-based pattern matching method. We use tuple pruning algorithm with Bloom filters, which effectively remove unnecessary tuples. Unlike other existing signature hashing-based IPS, our proposed method to improve the performance of IPS.