• Electrical & Electronic Materials
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• v.23 no.10
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• pp.25-32
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• 2010

• Proceedings of the Korean Nutrition Society Conference
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• 2001.05a
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• pp.242.1-242
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• 2001

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.5
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• pp.525-532
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• 2004

In this paper, we proposed a multicast routing algorithm for QoS improvement in the wire/wireless integrated environment. We analyzed requests and characteristics of QoS, and then proposed a new algorithm that can improve QoS by adding node mobility to wire environment. This new algorithm constructs a dynamic multicast tree that can prevent a loss of packet and save the bandwidth. As a result of simulations comparing to another multicast algorithms, we showed that this new algorithm can simply and dynamically adjusts the construction of multicast tree with little delay and the most reducible bandwidth resources.

• Proceedings of the Korea Information Processing Society Conference
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• 2015.04a
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• pp.6-9
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• 2015

유무선 네트워크 기술의 급격한 발전 및 개인용 휴대 장치의 보급 증가와 그에 맞물린 소셜네트워크 서비스 등의 활성화로 인해 데이터의 전송량이 폭발적으로 늘어나고 있으며, 이러한 추세는 향후 지속될 것으로 전망된다. 이에 데이터센터의 수요가 증가하고 있으며, 확장 및 유지보수가 쉬우면서도 높은 성능을 갖는 시스템에 대한 요구가 높아지고 있다. 본 논문에서는 데이터센터 네트워크의 구성요소를 분석하고 각각의 지연시간을 알아보았으며, 그 중 확장 및 유지보수가 쉬우나 상대적으로 지연시간이 높은 이더넷을 데이터센터에 적용하였을 때 지연시간 개선을 위한 방법으로 Intel DPDK를 적용할 경우, 미적용시와 비교하여 약 86%의 지연시간 감소를 확인하였고, 추가 향상 방안을 조망하였다.

• Proceedings of the Optical Society of Korea Conference
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• 2003.07a
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• pp.206-207
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• 2003

광집적회로의 등장으로 그 설계에 있어서 다양한 구조의 광배선은 필수적 요소가 되었다. 일반적으로 전기적 배선 및 소자간에 전자기파의 간섭으로 인해 신호의 왜곡이 야기될 뿐 아니라 기생정전효과 등에 의해 소자 시간지연이 유발되듯이, 광 집적회로에서도 광배선간 감쇄필드의 겹침으로 인해 원하지 않는 광결합이 발생하게 된다. 이러한 광집적회로내에서의 이러한 불필요한 광결합을 줄이기 위해서 곡선형 구조의 광배선들이 이용되며 대부분의 경우 이러한 곡선형 도파로 부분의 광결합은 무시된다. (중략)

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.3
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• pp.321-330
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• 2010

In this paper, the theoretical background and the specific implementation method of a compressive receiver for RFID signal detection as well as the design method of DDL(Dispersive Delay Line) and chirp LO are described. DDL, which is one of the main components of the compressive receiver, is designed to have $13{\mu}s$ dispersive delay time and 6 MHz bandwidth using the SAW technique based on $LiNbO_3$ material. The chirp LO is designed using DDS(Direct Digital Synthesizer). Also the compressive receiver is fabricated to be installed into the RFID reader. Test results show the maximum frequency error of 25 kHz for single signal input, the receiver sensitivity of -44 dBm, and the maximum frequency error is 75 kHz for 6 multi-tone input signals. These results indicate that the fabricated compressive receiver is working well even in dense RFID operating environments.

• The Transactions of the Korea Information Processing Society
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• v.5 no.3
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• pp.862-872
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• 1998

In this paper, we developed a delay test architecture and test procedure for clocked sequential circuit. In addition, we analyze the problems of conventional and previous method on delay test for clocked sequential circuit in IEEE 1149.1. This paper discusses several problems of Delay test on IEEE 1149.1 for clocked sequential circuit. Previous method has some problems of improper capture timing, of same pattern insertion, of increase of test time. We suggest a method called ARCH-S, is based on a clock counting technique to generate continuous clocks for clocked input of CUT. A 4-bit counter is selected for the circuit under test. The simulation results ascertain the aecurate operation and effectiveness of the proposed architecture.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.9
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• pp.78-85
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• 2000

A new analytical VLSI interconnect delay model is presented and its accuracy is experimentally verified. In the model, the transmission line parameter variations due to skin effect, proximity effect, and silicon substrate effect are taken into account. That is, the circuit model of the interconnect line that includes these effects is newly developed and analyzed. For the model verification, test patterns combined the coplanar structure with microstrip were designed by using 0.35${\mu}m$ CMOS process technology. It is shown that the accuracy of the model is less than about 10% error.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.6
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• pp.44-52
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• 2017

In this paper, we propose a DFD (Digital Frequency Discriminator) design that has better frequency discrimination and a smaller size. Electronic warfare equipment can analyze different types of radar signal such as those based on Frequency, Pulse Width, Time Of Arrival, Pulse Amplitude, Angle Of Arrival and Modulation On Pulse. In order for electronic warfare equipment to analyze radar signals with a narrow pulse width (less than 100ns), they need to have a special receiver structure called IFM (Instantaneous Frequency Measurement). The DFD (Digital Frequency Discriminator) is usually used for the IFM. Because the existing DFDs are composed of separate circuit devices, they are bulky, heavy, and expensive. To remedy these shortcomings, we use a three delay line ($1{\lambda}$, $4{\lambda}$, $16{\lambda}$) in the DFD, instead of the four delay line ($1{\lambda}$, $4{\lambda}$, $16{\lambda}$, $64{\lambda}$) generally used in the existing DFDs, and apply the microwave integrated circuit method. To enhance the frequency discrimination, we detect the pulse amplitude and perform temperature correction. The proposed DFD has a frequency discrimination error of less than 1.5MHz, affording it better performance than imported DFDs.

• Journal of Astronomy and Space Sciences
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• v.19 no.4
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• pp.273-282
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• 2002

We describe some performance of the detector electronics system for the FIMS (Far-ultraviolet Imaging Spectrograph) mission. The FIMS mission to map the far ultraviolet sky uses MCP (micro-channel plate) detectors with a crossed delay line anode to record photon arrival events. FIMS has two MCP detectors, each with a ~25mm$\times$25mm active area. The unconventional anode design allows for the use of a single set of position encoding electronics for both detector fields. The centroid position of the charge cloud, generated by the photon-stimulated MCP, is determined by measuring the arrival times at both ends of the anode following amplification and external delay. The temporal response of the detector electronics system determines the readout's positional resolution for the charge centroid. High temporal resolution (<$35{\times}75$ps FWHM) and low power consumption (< 6W) were achieved for the FIMS detector electronics system.