• The KIPS Transactions:PartA
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• v.9A no.2
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• pp.259-266
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• 2002

In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM (or SRAM) cell. Layout pitch of one-bit-wide logic is Identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1) simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12B
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• pp.2407-2414
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• 1999

This paper introduces the concept of warped discrete cosine transform (WDCT) and an image compression algorithm based on the WDCT. The proposed WDCT is a cascade connection of a conventional DCT and all-pass filters whose parameters can be adjusted to provide frequency warping. In the proposed image compression scheme, the frequency response of the all-pass filter is controlled by a set of parameters with each parameter for a specified frequency range. For each image block, the best parameter is chosen from the set and is sent to the decoder as a side information along with the result of corresponding WDCT computation. For actual implementation, the combination of the all-pass IIR filters and the DCT can be viewed as a cascade of a warping matrix and the DCT matrix, or as a filter bank which is obtained by warping the frequency response of the DCT filter bank. Hence, the WDCT can be implemented by a single matrix computation like the DCT. The WDCT based compression, outperforms the DCT based compression, for high bit rate applications and for images with high frequency components.

• The Journal of the Acoustical Society of Korea
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• v.42 no.5
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• pp.403-411
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• 2023

Functional ultrasound imaging, such as elasticity imaging and micro-blood flow Doppler imaging, enhances diagnostic capability by providing useful mechanical and functional information about tissues. However, the implementation of functional ultrasound imaging poses limitations such as the storage of vast amounts of data in Radio Frequency (RF) data acquisition and processing. In this paper, we propose a sub-Nyquist approach that reduces the amount of acquired axial samples for efficient shear-wave elasticity imaging. The proposed method acquires data at a sampling rate one-third lower than the conventional Nyquist sampling rate and tracks shear-wave signals through RF signals reconstructed using band-pass filtering-based interpolation. In this approach, the RF signal is assumed to have a fractional bandwidth of 67 %. To validate the approach, we reconstruct the shear-wave velocity images using shear-wave tracking data obtained by conventional and proposed approaches, and compare the group velocity, contrast-to-noise ratio, and structural similarity index measurement. We qualitatively and quantitatively demonstrate the potential of sub-Nyquist sampling-based shear-wave elasticity imaging, indicating that our approach could be practically useful in three-dimensional shear-wave elasticity imaging, where a massive amount of ultrasound data is required.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.9 s.351
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• pp.64-68
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• 2006

Novel system-on-package (SOP) - D technology to improve the mechanical and thermal properties of a MCM-D substrate was suggested. Based on this investigation, the two types of band pass filters for the V-band application with unique structure were designed and implemented using 2-metals, 3-BCB layers. The first type using distributed resonator had the insertion loss below 2.6 dB at 55 GHz and group delay was below 0.06 ns. For the second type with edge coupled structure, the insertion loss and group delay were 3 dB and 0.1 ns, respectively. Suggested MCM-D substrate with band pass filter can be used to evaluate mm-Wave system including flip-chip bonded MMIC.

• The KIPS Transactions:PartB
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• v.9B no.1
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• pp.29-34
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• 2002

Fingerprint recognition technology was studied by classification and matching. In general, there are five different classifications left loop, right loop, whore, arch, and tented-arch. These classifications are used to determine which class an individual's fingerprint belong to, thereby identifying the individual's fingerprint pattern. The result of this classification, which is sent to the large fingerprint database as an index, helps reduce the matching time and enhance the accuracy of fingerprint matching. The existing fingerprint classification method relies on the number and location of cores and delta points called singular points. The drawback of this method is the lack of accuracy stemming from the classification difficulty involving unclear and/or partially-erased fingerprints. The current paper presents an efficient classification method to rectify the problem associated with identifying Singular points from unclear fingerprints. This method, which is based on Gabor filter's unique characteristics for magnifying directional patterns and frequency range selections, improves fingerprint classification accuracy significantly. In this paper, this method is described and its test result is presented for verification.

• The Journal of Engineering Research
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• v.2 no.1
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• pp.39-47
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• 1997

This paper presents a single board digital signal processing system which can perform two-dimensional (2-D) digital infinite impulse response (IIR) filtering in realtime. We have developed an architecture to provide not only the necessary computational power but also a balance of the system input/output and computational requirements. The architecture achieves large system throughput by using highly parallel processing at both the system and processor levels. It reduces system data communication requirements significantly by taking advantage of a custom-designed processor and by providing each processor with its own input and ouput channel. After system initialization, almost 100 percent of the time is used for data processing. Data transfers occur concurrently with data processing. The functional level simulation reveals that the system throughput can reach as high as one pixel per system cycle. With only 10MHz clock frequency system, it can implement up to fourth order 2-D IIR filters for video-rate data ($512\times512$ pixels per frame at 30 frames per second). If we increase the system frequency, the system can be used for the preprocessing and postprocessing of video signal of HDTV.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.4
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• pp.895-902
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• 2015

This paper presents a high-speed sensing and noise cancellation technique for large touch screens, which is called FDCS (Frequency Division Concurrent Sensing). Most conventional touch screen detection methods apply excitation pulses sequentially and analyze the sensing signals sequentially, and so are often unacceptably slow for large touch screens. The proposed technique applies sinusoidal signals of orthogonal frequencies simultaneously to all drive lines, and analyzes the signals from each sense line in frequency domain. Its parallel driving allows high speed detection even for a very large touch screens. It enhances the sensing SNR (Signal to Noise Ratio) by introducing a frequency domain noise filtering scheme. We also propose a pre-distortion equalizer, which compensates the drive signals using the inverse transfer function of touch screen panel to further enhance the sensing SNR. Experimental results with a 23" large touch screen show that the proposed technique enhances the frame scan rate by 273% and an SNR by 43dB compared with a conventional scheme.

• Geophysics and Geophysical Exploration
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• v.12 no.2
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• pp.192-198
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• 2009

Side scan sonar and SBP (sub-bottom profiler) play a very important role in the survey for seafloor imaging and sub-bottom profiling. In this study, we have acquired side scan sonar and SBP data from the artificial reef area. We applied digital image processing techniques to side scan sonar data in order to improve an image quality. For the enhancement of data quality and image resolution, we applied the typical seismic data processing sequence including gain recovery, muting, spectrum analysis, predictive deconvolution, migration to SBP data. We could easily estimate if artificial reef structures were settled properly and their distribution on the seafloor from the integrated interpretation of side scan sonar and SBP data. From the sampling analysis of seabed sediments, texture filtering of side scan sonar data and SBP data interpretation, we could evaluate the sediment type, distribution and thickness of seafloor sediments in detail.

• Journal of Broadcast Engineering
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• v.14 no.5
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• pp.638-649
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• 2009

Image resizing (or scaling) is one of the most essential issues for the success of visual service because image data has to be adapted to the variety of display features. For 2D imaging, the image scaling is generally accomplished by 2D image re-sampling (i.e., up-/down-sampling). However, when it comes to stereoscopic 3D images, 2D re-sampling methods are inadequate because additional consideration on the third dimension of depth is not incorporated. Practically, stereoscopic 3D image scaling is process with left/right images, not stereoscopic 3D image itself, because the left/right Images are only tangible data. In this paper, we analyze stereoscopic 3D image scaling from two aspects: geometrical deformation and frequency-domain aliasing. A number of 3D displays are available in the market and they have various screen dimensions. As we have more varieties of the displays, efficient stereoscopic 3D image scaling is becoming more emphasized. We present the recommendations for the 3D scaling from the geometric analysis and propose a disparity-adaptive filter for anti-aliasing which could occur during the image scaling process.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4A
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• pp.336-344
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• 2005

Discrete Wavelet Transform(DWT) is the oncoming generation of compression technique that has been selected for MPEG4 and JEPG2000, because it has no blocking effects and efficiently determines frequency property of temporary time. In this paper, we propose an efficient bit-serial architecture for the low-power and low-complexity DWT filter, employing two-channel QMF(Qudracture Mirror Filter) PR(Perfect Reconstruction) lattice filter. The filter consists of four lattices(filter length=8) and we determine the quantization bit for the coefficients by the fixed-length PSNR(peak-signal-to-noise ratio) analysis and propose the architecture of the bit-serial multiplier with the fixed coefficient. The CSD encoding for the coefficients is adopted to minimize the number of non-zero bits, thus reduces the hardware complexity. The proposed folded 1D DWT architecture processes the other resolution levels during idle periods by decimations and its efficient scheduling is proposed. The proposed architecture requires only flip-flops and full-adders. The proposed architecture has been designed and verified by VerilogHDL and synthesized by Synopsys Design Compiler with a Hynix 0.35$\mu$m STD cell library. The maximum operating frequency is 200MHz and the throughput is 175Mbps with 16 clock latencies.