• Transactions of the Korean Society of Mechanical Engineers B
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• v.37 no.1
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• pp.35-41
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• 2013

In injection molding, the mold temperature is one of most important process parameters that affect the flow characteristics and part deformation. The mold temperature usually varies periodically owing to the effects of the hot polymer melt and the cold coolant as the molding cycle repeats. In this study, a pulsed mold temperature control was proposed to improve the part quality as well as the productivity by alternatively circulating hot water and cold water before and after the molding stage, respectively. Transient thermal-fluid coupled analyses were performed to investigate the heat transfer characteristics of the proposed pulsed mold heating and cooling system. The simulation results were then compared with those of the conventional mold cooling system in terms of the heating and cooling efficiencies of the proposed pulsed mold temperature control system.

• Journal of Energy Engineering
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• v.17 no.2
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• pp.67-76
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• 2008

A thermal-hydraulic integral effect test facility, ATLAS (Advanced Thermal-hydraulic Test Loop for Accident Simulation), has been constructed at KAERI (Korea Atomic Energy Research Institute). Recently several integral effect tests for the reflood period of a LBLOCA (Large Break LOss of Coolant Accident) of the APR1400 have been performed with the ATLAS. In the APR1400 a high flow condition is changed to a low flow condition due to an fluidic device during an operation of the SIT. As the self-controlled fluidic device was not installed in the ATLAS, a set of characterization tests was performed to simulate its injection capability from the SIT for the APR1400 simulation. In the ATLAS the required SIT flow rate in the high flow condition was acquired by installing orifices with an optimized flow area to throttle the SIT discharge line and the low flow condition was achieved by changing the opening of the flow control valve in the SIT injection line. The test results showed that the safety injection systems of the ATLAS could simulate the required high and low flow rates of the SIT for the APR1400 simulation efficiently.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.3
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• pp.283-292
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• 2016

The performance of 4-switch 3-phase inverter(: FSTPI) which replace two switches of 6-switch 3-phase inverter(: SSTPI) is mainly affected by the compensator unbalanced voltages and output voltage control method. This paper proposes a DC offset current injection method to compensate the capacitor unbalanced voltages for FSTPI. A simplified SVPWM method which can be applied to FSTPI is also proposed. The validity of the proposed methods is verified by simulation and experiment using SPMSM.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.36 no.1
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• pp.89-95
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• 2012

In this paper, microchannels for the flow control of two fluids with different volumes have been designed, fabricated, and verified. The dimensions of the inlets were determined based on the Stokes equation in order to realize that the flow of the two fluids meet at the same time, and to maintain a certain configuration when the flows passed through each inlet channel. The designed microchannels were confirmed using computational fluid dynamics simulation for the incompressible, Newtonian, and transient flows. In addition, a microfluidic system containing the designed microchannels was fabricated by soft lithography, and the pressure-driven flows of the two fluids were characterized by microfluidic experiments.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.18 no.2
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• pp.129-143
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• 2019

As the importance of autonomous vehicle safety is emphasized, the application of ISO-26262, a development verification guideline for improving safety and reliability, and the safety verification of autonomous vehicles are becoming increasingly important, in particular, SAE standard level 3 or higher level autonomous vehicles detect and decision the surrounding environment instead of the human driver. Therefore, if there is and failure or malfunction in the autonomous driving function, safety may be seriously affected. So autonomous vehicles, it is essential to apply and verity the safety concept against failure and malfunctions. In this study, we study the fault injection scenarios for safety evaluation and verification of autonomous vehicles using ISO-26262 part3 process and STPA were studied and safety measures for safety concept design were studied through simulation bases fault injection test.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1827-1829
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• 1999

반도체 소자가 고집적화 되고 미세화 될수록 좁은 면적에 여러 기능을 가진 우물을 형성시켜야하나 기존의 우물로는 고온 장시간 열처리로 인하여 측면 확산이 깊게 되고, 불순물 농도 분포는 표면으로부터 농도가 점차 낮아진다. 따라서 기존 우물의 불순물 분포로는 기생 트랜지스터에 의한 렛치-엎과 알파 입자에 의한 SER의 감소를 위하여 필요한 벌크에서의 고농도 분포를 유지하기가 곤란하다. 이러한 문제는 차세대 반도체 개발을 위해서는 반드시 해결해야 할 것이며 이것을 해결할 수 있는 공정으로는 고 에너지 이온 주입과 저온, 단시간 열처리이다. 고 에너지 이온 주입 시의 불순물 분포를 어떻게 제어할 것인가에 대한 것과 여기서 부수적으로 나타나는 격자 손상과 그 회복 및 잔류결함의 성질을 어떻게 알고 이를 게터링 등에 이용할 것이냐에 대한 것이다. 실리콘 기판 내로 가속된 이온은 실리콘 격자와 충돌하면서 많은 1차 결함이 생기고. 이들은 후속 열처리 과정에서 활성화되면서 대부분은 실리콘 격자의 위치에 들어가 활성화되고. 그 나머지는 실리콘내의 격자간 산소, 격자간 실리콘. 격자 빈자리와 상호 작용을 하여 2차 결함을 형성한다. 에피택셜 웨이퍼와 p-type웨이퍼에 비소 이온을 고에너지로 주입후 2단계 열처리에 의한 농도분포변화와 핵생성과 결함성장에 관해 실험하였고, 핵생성온도는 $600^{\circ}C$이하이고, 성장에 필요한 온도는 $700^{\circ}C$이상이다.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.6
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• pp.596-603
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• 2002

In this paper a new harmonic reduction method of three-phase diode rectifiers is proposed to improve input current performance using the zero-sequence harmonics injection technique. The proposed mothed, based on the third-harmonic injection, employs two half-bridge inverters and two single-phase transformers to independently shape the positive and negative dc rail currents of the diode rectifier. The actively shaped zero-sequence harmonic currents are t]ten circulated through the ac side of the rectifier using a zigzag transformer This results in pure sinusoidal input currents in the three-phase diode rectifier. Experimental results on a 1.5kVA prototype are provided to validate the proposed technique.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.496-496
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• 2013

스마트윈도우는 디스플레이, 산업용 외장재 등 다양한 분야에 응용이 가능하며, 특히 전기변색을 이용한 디바이스는 나노코팅 기술을 통한 나노입자 및 나노가공제어 등 나노융합기술을 접목할 수 있다. 전기변색 디바이스는유리 또는 필름 기판소재를 통해 제작이 가능하며, 본 연구에서는 전기변색의 산화, 환원반응에 의해 재료의 광특성이 가역적으로 변화할 수 있는 물질을 증착하여 기존 라미네이터 및 Sol-Gel방식의 전해질보다 열화현상에의한 성능저하를 막아주는 박막전해질 코팅 연구이다. 전기변색 소자는 외부 인가 전압(external voltage)에 의해 유도된 전하의 주입(injection) 과 추출(extraction)을 통하여 그 광학적 특성(optical property)을 가역적으로(reversibly) 변 화시킬 수 있는 특징을 가지고 있다. 전기변색소재의 원리를 간략하게 설명하면 대표적인 환원착색 물질인 전기변색층(WO, MoO, Nb2O5 등)으로 Li+ 또는 H+과 전자가 주입되면 전기변색되고 방출 시는 투명하게 되며, 반대로산화착색 물질인(V2O5, NiO, IrO, MnO 등)으로 Li+ 또는 H+과 전자가 방출되면 변색되고 주입되면 투명하게 되는 것이다. 본 연구에서는 전자가 주입되는 환원착색물질인 WO와 함께 Ta2O5박막을 증착하여 광학적특성을 연구하고 박막의 두께 및 전압인가에따른 변색 및 응답속도를 연구하고자 한다.

• Journal of Satellite, Information and Communications
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• v.10 no.4
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• pp.1-5
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• 2015

The ESD(electrostatic discharge) protection performance of PPS(PMOS pass structure) embedded N-type silicon controlled rectifier(NSCR_PPS) device with different partial p-well(PPW) structure was discussed for high voltage I/O applications. A conventional NSCR_PPS standard device shows typical SCR-like characteristics with low on-resistance, low snapback holding voltage and low thermal breakdown voltage, which may cause latch-up problem during normal operation. However, our proposed NSCR_PPS devices with modified PPW_PGM(primary gate middle) and optimal CPS(counter pocket source) implant demonstrate the stable ESD protection performance with high latch-up immunity.

• Journal of Satellite, Information and Communications
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• v.11 no.4
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• pp.21-26
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• 2016

The ESD(electrostatic discharge) protection performance of PPS(PMOS pass structure) embedded N-type silicon controlled rectifier(NSCR_PPS) device with different implant of channel blocking region was discussed for high voltage I/O applications. A conventional NSCR standard device shows low on-resistance, low snapback holding voltage and low thermal breakdown voltage, which may cause latch-up problem during normal operation. However, our proposed NSCR_PPS devices with modified channel blocking structure demonstrate the improved ESD protection performance as a function of channel implant variation. Therefore, the channel blocking implant was a important parameter. Since the modified device with CPS_PDr+HNF structure satisfied the design window, we confirmed the applicable possibility as a ESD protection device for high voltage operating microchips.