• Science of Emotion and Sensibility
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• v.17 no.2
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• pp.111-122
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• 2014

This study has analyzed the scanning path algorithm shown at the process of exploring spatial information through an observation experiment with the object of lobby in subway station. In the estimation of observation time by section, the frequency of scanning type was found to increase as the observation time got longer, which makes it possible that the longer the observation lasts the more the observation interruptions occur. In addition, the observation slipped out of the range of imaging when any fatigue was caused from the observation or the more active exploration took place. Furthermore, when the trend line was employed for the examination of the changes to the scanning type by time section, "concentration" "diagonal or vertical" showed a sharp and a gentle increases along with the increase of time section respectively, while "circulation. combination, horizontal" showed a reduction. The observation data of the subjects observing a space include various visual information. The analysis of the scanning type found at "attention concentration" enabled to draw this significant conclusion. The features of increase and decrease of scanning types can be a fundamental data for understanding the scanning tendency by time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.4A
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• pp.369-379
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• 2011

During the routing process between nodes on the CR(Cognitive Radio) network conducting for efficient use of limited frequency resources, spectrum handover process due to the appearance of the PU occupies most of the routing latency, and also decreases the reliability of the path. In this paper, a cooperative routing protocol in a multi-channel environment is proposed. The source node broadcasts a message with available channel lists and probability of PU appearance during its route guidance. The intermediate nodes re-transmit the message, received from the source node, and update and maintain the information, status table of the path. The destination node determines the optimal path and sends a reply message to the selected path after it receives the messages from the intermediate nodes. The average probability of the PU appearance and the average time of the PU appearance are updated while transferring data. During data transmission the channel with the lowest probability of appearance of the PU is selected dynamically and if a PU appears on the current channel partial repairment is performed. It is examined that reliability of the selected path considerably is improved and the routing cost is reduced significantly compared to traditional routing methods.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.2
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• pp.14-25
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• 1999

The IEEE standard 1149.1, which was proposed to increase the observability and the controllability in I/O pins, makes it possible the board level testing. In the boundary-scan environments, many shift operations are required due to their serial nature. This increases the test application time and the test application costs. To reduce the test application time, the method based on the parallel opereational multiple scan paths was proposed, but this requires the additional I/O pins and the internal wires. Moreover, it is difficult to make the designs in conformity to the IEEE standard 1149.1 since the standard does not support the parallel operation of data shifts on the scan paths. In this paper, the multiple scan path access algorithm which controls two scan paths simultaneously with one test bus is proposed. Based on the new algorithm, the new algorithm, the new board level BIST architecture which has a relatively small area overhead is developed. The new BIST architecture can reduce the test application time since it can shift the test patterns and the test responses of two scan paths at a time. In addition, it can reduce the costs for the test pattern generation and the test response analysis.

• Journal of the Korean Society for Precision Engineering
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• v.22 no.12 s.177
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• pp.205-210
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• 2005

This paper addresses the correlation between the change of file size and the scanning path build time by the slicing height of STL file. Though the study about STL file has been achieved quite actively scanning path build time using STL file is not investigated so much to be satisfied. The file size depends on the number of polygon created by the slicing height specified. And this number of polygons increases in a regular rate. The correlation between the number of polygons and the scanning path build time is examined and verified.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.190-193
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• 2004

This paper presents studies on the creation time of scanning path using rapid prototype device. In the case of Jewellery, it needs to take time too much at the whole process of rapid prototype in accordance with heigh of the multi-layered. When increases the number of polygon by heigh of the Multi-layered, it has proper influence on the creation time of scanning path. Therefore, we can get the spending time and the number of polygon for the creation during increase the heigh of the multi-layered. These values are showed by the quantitative. We try to analyze relation between these and heigh of the multi-layered.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.114-118
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• 2004

This paper is compared the build time of scanning path as to laminate height of the SLC and STL file. The STL file improve the surface roughness according to slicing height. But it have the fault spending long time to the creation of scanning path by being lower slicing height. So we proposed the SLC file to improve this fault. Therefore this paper showed to the build time of scanning path by the increase of peace using the jewellery model.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.04a
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• pp.405-409
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• 1997

Voronoi diagrams are applied in varios field such as NC toolpath generation, VLSI design and robot path planning because of their geometric charcteristics. In this paper, Voronoi diagrams are introduced on polygon constructed by line segments only and with constant offset. Bisector curves for two arbitrary objects, which is the combination of line segment and arc, are defined as parametric fuction where the parameter is used as offset. Offset curves are applied on the generation of laser scanning path for the stereolithography and shows a good result from several examples.

• The Transactions of the Korea Information Processing Society
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• v.7 no.10
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• pp.3226-3235
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• 2000

The more complex and larger semiconductor integraed circuits become, the core important delay test becomes which guarantees that semiconductor integrated circuits operate in time. In this paper, we propose a new partial enhanced scan method that can generate test patterns for path delay faults offectively. We implemented a new partial enhanced scan method based on an automatic test pattern generator(ATPG) which uses implication and justification . First. we generate test patterns in the standard scan environment. And if test patterns are not generated regularly in the scan chain, we determine flip-flops which applied enhanced scan flip-flops using the information derived for running an automatic test pattern generator inthe circuti. Determming enhanced scan flip-flops are based on a fault coverage or a hardware overhead. through the expenment for JSCAS 89 benchmark sequential circuits, we compared the fault coverage in the standard scan enviroment and enhance scan environment, partial enhanced scan environment. And we proved the effectiveness of the new partial enhanced scan method by identifying a high fault coverage.

• Proceedings of the KSME Conference
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• 2005.11a
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• pp.213.1-213.1
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• 2005

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.10a
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• pp.409-410
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• 2006