• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.5
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• pp.82-89
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• 1993

In this paper, we proposed the autonomous algorithm of pseudo-exhaustive testing for the multi-level combinational logic circuits. For the processing of shared-circuit that existed in each cone-circuit when it backtracked the path from PO to PI of CUT at the conventional verification testing, the dependent relation of PI-P0 is presented by a dependence matrix so it easily partitioned the sub-circuits for the pseudo-exhaustive testing. The test pattern of sub-circuit's C-inputs is generated using a binary counter and the test pattern of I-inputs is synthesized using a singular cover and consistency operation. Thus, according to the test patterns presented with the recipe cube, the number of test pattrens are reduced and it is possible to test concurrently each other subcircuits. The proposed algorithm treated CUT's net-list to the source file and was batch processed from the sub-circuit partitioning to the test pattern generation. It is shown that the range of reduced ration of generated pseudo-exhaustive test pattern exhibits from 85.4% to 95.8% when the average PI-dependency of ISACS bench mark circuits is 69.4%.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.10
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• pp.5134-5139
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• 2013

Ladder Diagram(LD) or Sequential Function Chart(SFC) is used for the design of complex modern control system with Programmable logic controller(PLC). LD is the most widely utilized among PLC standard language. But recently, SFC is used frequently. SFC is very easy to grasp the sequential flow of control logic but is difficult for describing combinational logic. When the interrupt factor is occurred, the main program is stopped. And after the interrupt program is completed, the main program is restart. Therefore the more complex the interrupt program, the main program is interrupted downtime will be that much longer. In this paper, we propose the method for interrupt implementation without the dwell time of the main program by SFC language and confirm his feasibility through the simulation.

• Journal of KIISE:Software and Applications
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• v.29 no.5
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• pp.289-294
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• 2002

It is known that restructuring feed-forward neural network affects generalization capability and efficiency of the network. In this paper, we introduce a new approach to restructure a neural network using abstraction of the hidden knowledge that the network has teamed. This method involves extracting local rules from non-input nodes and aggregation of the rules into global rule base. The extracted local rules are used for pruning unnecessary connections of local nodes and the aggregation eliminates any possible redundancies arid inconsistencies among local rule-based structures. Final network is generated by the global rule-based structure. Complexity of the final network is much reduced, compared to a fully-connected neural network and generalization capability is improved. Empirical results are also shown.

• The Transactions of the Korea Information Processing Society
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• v.4 no.1
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• pp.311-323
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• 1997

This paper presents a fast fault simulation system for detecting stuck-at faults in mixed-level combinational logic circuits with gale level and switch -level primitives. For a practical fault simulator, the types are not restricted to static switch-level and/or gate-level circuits, but include dynamic switch-level circuits. To efficiently handle the multiple signal contention problems at wired logic elements, we propose a six-valued logic system and its logic calculus which are used together with signal strength information. As a basic algorithm for the fault simulation process, a well -known gate-level parallel pattern single fault propagation(PPSFP) technique is extended to switch-level circuits in order to handle pass-transistor circuits and precharged logic circuits as well as static CMOS circuits. Finally, we demonstrate the efficiency of our system through the experimental results for switch-level ISCAS85 benchmark combinational circuits and various industrial mixed-level circuits.

• Journal of the Korean Regional Science Association
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• v.32 no.4
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• pp.75-90
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• 2016

It is unique from other financial institutions that credit unions in Korea have been developed as voluntary activity for enhancing the financial access of the poor in 1960s. However, currently some raise criticism that the cooperative identity as voluntary movement has been weaker. This paper endeavor to analyze the growth of credit unions during 2000s and explain what the implications of their growth are, using data from National Credit Union Federation of Korea. Our findings are as follows; firstly, the development of credit unions in 2000s are able to be regarded as a reflection of the rationale of advocate for quantitative growth. Secondly, the growth of credit unions are mostly dependant on non-taxable deposit, large loan, and collateralized loan which can lead to weaken the identity as voluntary cooperatives. Thirdly, the strategy of quantitative growth cannot be helpful for soundness of asset and profitability, eventually weakening their sustainability.

• Korean Journal of Cognitive Science
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• v.13 no.4
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• pp.80-80
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• 2002

The main thesis of this article is that the decisive point of creativity education is the cultivation of critical thinking capability. Although the narrow conception of creativity as divergent thinking is not subsumed under that of critical thinking, the role of divergent thinking is not so crucial in the science context of creative problem-solving. On the contrary, the broad conception of creativity as focusing on the reference to utility and the third conception of creativity as a process based on the variation and combination of existing pieces of information are crucial in creative problem-solving context, which are yet subsumed under that of critical thinking. The emphasis on critical thinking education is connected with the characteristics of contemporary knowledge-based society. This rapidly changing society requires situation-adaptive or situation-sensitive cognitive ability, whose core is critical thinking capability. Hence, the education of critical thinking is to be centered on the learning of blowing-how and procedural knowledge but not of knowing-that and declarative knowledge. Accordingly, the learning of critical thinking is to be headed towards the cultivation of competence but not just of performance. In conclusion, when a rational problem-solving through critical and logical thinking turns out consequently to be novel, we call it creative thinking. So, creativity is an emergent property based on critical and logical thinking.

• Korean Journal of Cognitive Science
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• v.13 no.4
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• pp.81-90
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• 2002

The main thesis of this article is that the decisive point of creativity education is the cultivation of critical thinking capability. Although the narrow conception of creativity as divergent thinking is not subsumed under that of critical thinking, the role of divergent thinking is not so crucial in the science context of creative problem-solving. On the contrary, the broad conception of creativity as focusing on the reference to utility and the third conception of creativity as a process based on the variation and combination of existing pieces of information are crucial in creative problem-solving context, which are yet subsumed under that of critical thinking. The emphasis on critical thinking education is connected with the characteristics of contemporary knowledge-based society. This rapidly changing society requires situation-adaptive or situation-sensitive cognitive ability, whose core is critical thinking capability. Hence, the education of critical thinking is to be centered on the learning of blowing-how and procedural knowledge but not of knowing-that and declarative knowledge. Accordingly, the learning of critical thinking is to be headed towards the cultivation of competence but not just of performance. In conclusion, when a rational problem-solving through critical and logical thinking turns out consequently to be novel, we call it creative thinking. So, creativity is an emergent property based on critical and logical thinking.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.1
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• pp.75-82
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• 2000

In this paper, a new low power 16-bit ALU has been designed, fabricated and tested at the transistor level. The designed ALU performs 16 instructions and has a two-stage pipelined architecture. For the reduction of switched capacitance, the ELM adder of the proposed ALU is inactive while the logical operation is performed and P(propagation) block has a dual bus architecture. A new efficient P and G(generation) blocks are also proposed for the above ALU architecture. ELM adder, double-edge triggered register and the combination of logic style are used for low power consumption as well. As a result of simulations, the proposed architecture shows better power efficient than conventional architecture$^{[1,2]}$ as the number of logic operation to be performed is increased over that of arithmetic to logic operation to be performed is 7 to 3, compared to conventional architecture. The proposed ALU was fabricated with 0.6${\mu}m$ single-poly triple-metal CMOS process. As a result of chip test, the maximum operating frequency is 53MHz and power consumption is 33mW at 50MHz, 3.3V.

• Journal of Internet Computing and Services
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• v.2 no.2
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• pp.71-93
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• 2001

Commonly to design a database system. a conceptual database has to be designed and then it is transformed into a logical database schema prior to building a target database system. This paper proposes a method which transforms a Temporal Entity-Relationship Model(TERM) into a Temporal Object-Oriented Model(TOOM) to build an efficient database schema. I formalize the time concept in view of object versioning and specify the constraints required during transformation procedure. The proposed transformation method contributes to getting the logical temporal data from the conceptual temporal events Without any loss of semantics, Compared to other approaches of supporting various properties, this approach is more general and efficient because it is the semantically seamless transformation method by using the orthogonality of types of objects, semantics of relationships and constraints over roles.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.7
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• pp.1259-1265
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• 2006

In this paper, we propose a combined synthetic algorithm of the logic level for high speed FPGA design. The algorithm divides critical path to reduce delay time and generates a circuit which the divided circuits execute simultaneously. This kernel selection algorithm is made by C-langage of SUN UNIX. We compare this with the existing FlowMap algorithm. This proposed algorithm shows result on 33.3% reduction of delay time by comparison with the existing algorithm.