• Journal of Broadcast Engineering
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• v.10 no.1 s.26
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• pp.22-30
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• 2005

We implement an interactive 3D audio broadcasting terminal which synthesizes an audio scene according to the request of a user. Audio scene structure is described by the MPEG-4 AudioBIFS specifications. The user updates scene attributes and the terminal synthesizes the corresponding sound images in the 3D space. The terminal supports the MPEG-4 Audio top nodes and some visual nodes. Instead of using sensor nodes and route elements, we predefine node type-specific user interfaces to support BIFS commands for field replacement. We employ sound spatialization, directivity/shape modeling, and reverberation effects for 3D audio rendering and realistic feedback to user inputs. We also introduce a virtual concert program as an application scenario of the interactive broadcasting terminal.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.11
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• pp.1754-1766
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• 1993

The application of VXIbus system, an Industry standard, is rapidly spreading with its ability to offer the easiness of integration from GPIB and the fast data transmission from VMEbus system. Compared with VXIbus Register Based Device, VXIbus Message Based Device has a drawback In the aspect of speed. But it is possible to utilize high level ASCII commands to control a Message Based Device, therefore system integration is much easier with Message Based Device than with Register Based Device. And, the FFT analyzer is an instrument for signal analysis which can be inexpensively implemented to be fast and have high resolution. Its wide ability of analysis presents numerous application. So, it is necessary to apply VXIbus system to FFT analyzer. In this paper, the implementation of FFT analyzer is performed using a DSP module and by implementing all A/D conversion circuit and a control module which performs VXIbus interface. The device can be controlled by Slot0 Commender which supports VXIbus Shared Memory Protocol through VXIbus.

• The Journal of the Acoustical Society of Korea
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• v.23 no.5
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• pp.390-399
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• 2004

In this paper, we design and implement a multiple-view VoiceXML editor to improve editing efficiency of the VoiceXML. The VoiceXML multiple-view Editor uses a MVC framework to support multiple views and paradigm. Our multiple-view editor consists of Model. View and Controller using MVC framework. A model, core data structure. is constructed of abstract syntax tree and abstract grammar. A view. user interface. is formalized in unparsing rules and unparser. A controller. to control model and view. is made of command interpreter and tree handler. The VoiceXML multiple-view editor overcomes a drawbacks of existing XML editors by showing document structure and context concurrently. as well as document flows. Our VoiceXML multiple-view editor. which MVC framework has been applied, provides various editing views concurrently to users. Thereby. it supports efficient and convenient editing environments for voice-web documents to users and it guarantees transparency of editors. as various views have a same consistent model.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.8
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• pp.1569-1580
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• 2016

For the 2.4 GHz active RFID to be successful in the market, one of the requirements is the increased battery life. However, currently we do not have any accurate power consumption estimation method. In this study we develop a simulation model, which can be used to estimate power consumption of tag accurately. Six different simulation models are proposed depending on collision algorithm and query command method. To improve estimation accuracy, we classify tag operating modes as the wake-up receive, UHF receive, sleep timer, tag response, and sleep modes. Power consumption and operating time are identified according to the tag operating mode. Query command for simplifying collection and ack command procedure and newly developed collision control algorithm are used in the simulation. Other performance measures such as throughput, recognition time for multi-tags, tag recognition rate including power consumption are compared with those from the current standard ISO/IEC 18000-7.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.6
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• pp.1409-1418
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• 1998

The recent audio CODEC(Coding/Decoding) algorithms are complex of several coding techniques, and can be divided into DSP tasks, controller tasks and mixed tasks. The traditional DSP processor has been designed for fast processing of DSP tasks only, but not for controller and mixed tasks. This paper presents a new architecture that achieves high throughput on both controller and mixed tasks of such algorithms while maintaining high performance for DSP tasks. The proposed processor, YSP-3, operates four algorithms while maintaining high performance for DSP tasks. The proposed processor, YSP-3, operates functional units (Multiplier, two ALUs, Load/Store Unit) in parallel via 4-issue super-scalar instruction structure. The performance evaluation of YSP-3 has been done through the implementation of the several DSP algorithms and the part of the AC-3 decoding algorithms.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.9
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• pp.1-12
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• 1999

In this paper, we designed an embedded processor with 128Kbytes EPROM and 4Kbytes SRAM based on GMS30C2132 which RISC processor with DSP functions. And a new architecture of bus sharing to control the embedded memory and external memory unit i proposed aiming at one-cycle access between memories and CPU. For embedded 128Kbytes EPROM, we designed the new expansion interface for data size at data ordering with memory organization and the efficient interface for test. The embedded SRAM supports an extended stack area high speed DSP operation, instruction cache and variable data-length control which is accessed with 4K modulo addressing schemes. The proposed new architecture and circuits reduced the memory access cycle time from 40ns and improved operation speed 2-times for program benchmark test. The chip is occupied $108.68mm^2$ using $0.6{\mu}m$ CMOS technology.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.11
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• pp.1219-1227
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• 1992

VXIbus is a standard for compatibility of instruments of multi-vendors and originated from the VMEbus. The devices for implementing VXIbus system can be categorized into the register based device and the message based device. In this paper we organized the A/D conversion module and the slot0 module, which form the register based VXIbus subsystem. The A/D conversion module is used as a digital voltmeter and LAN is used for communication between an external control computer and the slot0 module. The SCPI(Standard Commands for Programmable Instruments), which is a standard language for instruments, is transmitted from the external control computer to the slot0 module as the ASCII form, and then to the A/D conversion module after changing to the binary digit command. From the experiment. We verified that the measured voltage can be observed on external control computer and user interface can be improved by the modified graphic processing.

• KIISE Transactions on Computing Practices
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• v.21 no.8
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• pp.531-536
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• 2015

The speech recognition is an active research area in the human computer interface (HCI). The objective of this study is to control digital devices with voices. In addition, the mouse is used as a computer peripheral tool which is widely used and provided in graphical user interface (GUI) computing environments. In this paper, we propose a method of controlling the mouse with the real-time speech recognition function of a smartphone. The processing steps include extracting the core voice signal after receiving a proper length voice input with real time, to perform the quantization by using the learned code book after feature extracting with mel frequency cepstral coefficient (MFCC), and to finally recognize the corresponding vowel using hidden markov model (HMM). In addition a virtual mouse is operated by mapping each vowel to the mouse command. Finally, we show the various mouse operations on the desktop PC display with the implemented smartphone application.

• Journal of Korea Society of Industrial Information Systems
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• v.14 no.4
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• pp.91-100
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• 2009

In this paper, we propose autonomous intelligent wheelchair system which recognize the commands using the gaze recognition and avoid the detected obstacles by sensing the distance through range sensors on the way to driving. The user's commands are recognized by the gaze recognizer which use a centroid of eye pupil and two reflection points extracted using a camera with infrared filter and two infrared LEDs. These are used to control the wheelchair through the user interface. Then wheelchair system detects the obstacles using 10 ultrasonic sensors and assists that it avoid collision with obstacles. The proposed intelligent wheelchair system consists of gaze recognizor, autonomous driving module, sensor control board and motor control board. The gaze recognizer cognize user's commands through user interface, then the wheelchair is controled by the motor control board using recognized commands. Thereafter obstacle information detected by ultrasonic sensors is transferred to the sensor control board, and this transferred to the autonomous driving module. In the autonomous driving module, the obstacles are detected. For generating commands to avoid these obstacles, there are transferred to the motor control board. The experimental results confirmed that the proposed system can improve the efficiency of obstacle avoidance and provide the convenient user interface to user.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.109-118
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• 2007

As the integration density and the operating speed of System on Chips (SoCs) become increasingly high, it is crucial to test delay defects on the SoCs. This paper introduces an enhanced IEEE 1500 wrapper cell architecture and IEEE 1149.1 TAP controller for the wrapper interface logic, and proposes a transition delay fault test method. The method proposed can detect slow-to-rise and slow-to-fall faults sequentially with low area overhead and short test time. and simultaneously test IEEE 1500 wrapped cores operating at different core clocks.