• Title/Summary/Keyword: 정지원

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A Study on Electrical Properties and Structure Analysis of Epoxy-Ceramic Composite Materials (에폭시-세라믹 복합재료의 전기적 특성 및 구조분석)

  • 정지원;홍경진;김태성
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1994.05a
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    • pp.9-12
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    • 1994
  • Epoxy-Ceramic Composite have good insulating, therma1 and mechanical properties, so it is studied actively on this material. In this thesis, we made a composite material b)\ulcorner filling Epoxy Resin with ceramics treated with Sillane Coupling Agent and studied dielectric and insulating characteristics according to treatment density of Sillane Coupling Agent and weight percent of filler. As a result, loss tangent increase and electrical breakdown voltage decrease according to increasing treatment density of sillane coupling agent because Interface matching between matrix and filler is not good. The best treatment density of sillane coupling agent is 0.5% water solution, in this density the best interface matching is achieved so good dielectric and insulation characteristics are shown. Dielectric and insulation characteristics according to weight percent of filler are best at 25wt.

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A Study on High Speed LDPC Decoder Based on HSS (HSS기반의 고속 LDPC 복호기 연구)

  • Jung, Ji Won
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.5 no.3
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    • pp.164-168
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    • 2012
  • LDPC decoder architectures are generally classified into serial, parallel and partially parallel architectures. Conventional method of LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. It is necessary to reduce the iteration numbers and computation operations without performance degradation. This paper studies Horizontal Shuffle Scheduling (HSS) algorithm. In the result, number of iteration is half than conventional algorithm without performance degradation. Finally, this paper present design methodology of high-speed LDPC decoder and confirmed its throughput is up to about 600Mbps.

Experiment performance analysis of turbo code based turbo equalizer (터보 부호 기반의 터보 등화기 실험 성능 분석)

  • Park, Gun-woong;Jung, Ji-won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.7
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    • pp.1525-1530
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    • 2015
  • In this paper, We analyzed the performance of turbo equalizer using turbo codes thorough the under water experiment. To compensate the distorted signal induced by multipath effect, we apply the iterative turbo codes that iteratively exchange probabilistic information between LMS-DFE and turbo decoder, thereby reducing the error rates significantly. We showed the successful of turbo decoding of iterative turbo equalizer is 93%.

An Efficient Method that Incorporate a Channel Reliability to the Log-MAP-based Turbo Decoding (Log-MAP 방식의 Turbo 복호를 위한 효과적인 채널 신뢰도 부과방식)

  • 고성찬;정지원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.3B
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    • pp.464-471
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    • 2000
  • The number of quantization bits of the input signals $X_k$,$Y_k$ need to be optimally determined through the trade-off between the H/W complexity and the BER performance in Turbo codes applications. Also, an effective means to incorporate a channel reliability $L_c$ in the Log-MAP-based Turbo decoding is highly required. because it has a major effect on both the complexity and the performance. In this paper, a novel bit-shifting approach that substitutes for the multiplying is proposed so as to effectively incorporate. $L_c$ in Turbo decoding. The optimal number of quantization bits of $X_k$,$Y_k$ is investigated through Monte-Carlo simulations assuming that bit-shifting approach is adopted. In addition. The effects of an incorrect estimation of noise variance on the performance of Turbo codes is investigated. There is a confined range in which the effects of an incorrect estimation can be ignored.

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VHDL Chip Set Design and implementation for Memory Tester Algorithm (Memory Tester 알고리즘의 VHDL Chip Set 설계 및 검증)

  • Jeong, Ji-Won;Gang, Chang-Heon;Choe, Chang;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.924-927
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    • 2003
  • In this paper, we design the memory tester chip set playing an important role in the memory tester as central parts. Memory tester has the sixteen inner instructions to control the test sequence and the address and data signals to DUT. These instructions are saved in memory with each chip such as sequence chip and address/data generator chip. Sequence chip controls the test sequence according to instructions saved in the memory. And Generator chip generates the address and data signals according to instructions saved in the memory, too.

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The Design of ASIC chip for Memory Tester (Memory Tester용 ASIC 칩의 설계)

  • Joung, J.W.;Kang, C.H.;Choi, C.;Park, J.S.
    • Proceedings of the KIEE Conference
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    • 2004.05a
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    • pp.153-155
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    • 2004
  • In this paper, we design the memory tester chip playing an important role in the memory tester as central parts. Memory tester has the sixteen inner instructions to control the test sequence and the address and data signals to DUT. These instructions are saved in memory with each block such as sequencer and pattern generator. Sequencer controls the test sequence according to instructions saved in the memory. And Pattern generator generates the address and data signals according to instructions saved in the memory, too. We can use these chips for various functional test of memory.

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HBr 가스를 이용한 MgO 박막의 고밀도 반응성 이온 식각

  • Kim, Eun-Ho;So, U-Bin;Gong, Seon-Mi;Jeong, Ji-Won
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.212-212
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    • 2010
  • 최근 차세대 반도체 메모리 소자로 대두된 magnetic random access memory(MRAM)에 대한 연구가 활발히 진행되고 있다. 특히 MRAM의 magnetic tunnel junction(MTJ) stack을 구성하는 자성 재료의 건식 식각에 대한 연구에서는 좋은 profile을 얻고, 재층착의 문제를 해결하기 위한 노력이 계속해서 진행되고 있다. 본 연구에서는 photoresist(PR)과 Ti 하드 마스크로 패턴 된 배리어(barrier) 층인 MgO 박막의 식각 특성을 유도결합 플라즈마를 이용한 고밀도 반응성 이온 식각(inductively coupled plasma reactive ion etching-ICPRIE)을 통해서 연구하였다. PR 및 Ti 마스크를 이용한 자성 박막들은 HBr/Ar, HBr/$O_2$/Ar 식각 가스의 농도를 변화시키면서 식각되었다. HBr/Ar 가스를 이용 식각함에 있어서 좋은 식각 조건을 얻기 위한 parameter로서 pressure, bias voltage, rf power를 변화시켰다. 각 조건에서 Ti 하드마스크에 대한 터널 배리어층인 MgO 박막에 selectivity를 조사하였고 식각 profile을 관찰하였다. 식각 속도를 구하기 위해 alpha step(Tencor P-1)이 사용되었고 또한 field emission scanning electron microscopy(FESEM)를 이용하여 식각 profile을 관찰함으로써 최적의 식각 가스와 식각 조건을 찾고자 하였다.

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A Study on Improvement of Etching Characteristics by Spray Characteristics Analysis with Nozzle Geometries in Wet Etching Process (습식 에칭공정에서 노즐 형상에 따른 분무특성 분석을 통한 에칭특성의 향상에 관한 연구)

  • Jung, Ji-Won;Kim, Duck-Jool
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.28 no.7
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    • pp.842-849
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    • 2004
  • The objective of this work is to study the improvement of etching characteristics in wet etching process. The etching characteristics such as etching factor were investigated under different etching conditions and compared with the spray characteristics. The spray characteristics of nozzle with different geometries such as swirler angle and swirl chamber aspect ratio were analyzed by using PDA system to predict the effect of the spray characteristics on the etching factor. The swirler angles were 49,5$^{\circ}$, 63$^{\circ}$ and 76.5$^{\circ}$. The swirl chamber aspect ratios were 1.2, 1.6 and 2.0. It was found that the etching factor was correlated with the spray characteristics and also the smaller swiller angle, the larger etching factor became.

Migration Policies of a Unified Index for Moving Objects Databases (이동체 데이터베이스를 위한 통합 색인의 이주 정책)

  • 정지원;안경환;서영덕;홍봉희
    • Proceedings of the Korean Information Science Society Conference
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    • 2004.04b
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    • pp.112-114
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    • 2004
  • 무선 통신 기술의 발달로 인하여 LBS(Location Based System)와 같은 새로운 이동체 관련 서비스가 생겨나고 있다. 위치 기반 서비스에서 클라이언트인 이동체들이 주기적으로 보고하는 위치 데이터를 실시간으로 처리하기 위해 서버에서는 메인 메모리 DBMS를 유지하는 것이 필요한데, 데이터의 양이 계속적으로 증가하는 특성으로 인해 메인 메모리의 공간이 부족할 때 데이터를 디스크로 옮기는 시스템 설계가 필요하다. 그러나 기존의 연구는 대용량 이동체 환경에서의 색인 이주를 위한 노드 선택 정책과 이주를 위해 선택된 노드들의 디스크 배치 정책을 통합하여 나타내지 못하였다. 그러므로 대용량 이동체 데이터베이스 시스템 환경에 적합한 이주 정책들에 대한 연구가 필요하다. 이 논문에서는 대용량 이동체 데이터베이스 환경을 고려한 노드 선택 정책과 디스크 배치 정책을 분류하고 새로운 이주 정 책을 제시한다. 노드 선택 정책으로는 질의 성능을 위해서 캐쉬의 LRU(Least Recently Used) 정책을 이용한 변형된 LRU정책을 제시하고, 삽입 우선 정책으로는 이동체 색인인 R-tree의 삽입 알고리즘을 역이용한 정책을 제시한다. 또한 이주되는 노드들에 대한 디스크 페이지 배치가 시스템의 질의 성능에 영향을 미치므로 이를 고려한 디스크 배치 정책을 제시한다.

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Computing a Minimum-Dilation Spanning Tree is NP-hard (최소-Dilation 신장 트리 찾기의 NP-hard 증명)

  • Cheong, Otfried;Haverkort, Herman;Lee, Mi-Ra
    • Proceedings of the Korean Information Science Society Conference
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    • 2006.10a
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    • pp.494-499
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    • 2006
  • Given a set S of n points in the plane, a minimum-dilation spanning tree of S is a tree with vertex set S of smallest possible dilation. We show that given a set S of n points and a dilation $\delta$ > 1, it is NP-hard to determine whether a spanning tree of S with dilation at most $\delta$ exists.

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