• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.39-47
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• 1998

A fourth-order $\Sigma$-$\Delta$ modulator is designed and implemented in 0.6 $\mu\textrm{m}$ CMOS technology. The modulator is verified by introducing nonlinear factors such as DC gain and slew rate in system model that determines the transfer function in S-domain and in time-domain. Dynamic range is more than 110 dB and the peak SM is 102.6 dB at a clock rate of 2.8224 MHz for voiceband signal. The structure of a ∑-$\Delta$ modulator is a modified fourth-order ∑-$\Delta$ modulator using direct feedback loop method, which improves performance and consumes less power. The transmission zero for noise is located in the first-second integrator loop, which reduces entire size of capacitors, reduces the active area of the chip, improves the performance, and reduces power dissipation. The system is stable because the output variation with respect to unit time is small compared with that of the third integrator. It is easy to implement because the size of the capacitor in the first integrator, and the size of the third integrator is small because we use the noise reduction technique. This paper represents a new design method by modeling that conceptually decides transfer function in S-domain and in Z-domain, determines the cutoff frequency of signal, maximizes signal power in each integrator, and decides optimal transmission-zero frequency for noise. The active area of the prototype chip is 5.25$\textrm{mm}^2$, and it dissipates 10 mW of power from a 5V supply.

• Journal of Radiation Protection and Research
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• v.40 no.2
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• pp.110-117
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• 2015

Recently, Due to the increased industry using radiation inspection equipment in the semiconductor, this demand of technology research is increasing. Although semiconductor inspection equipment is using low energy X-ray from 40 keV to 120 keV, Studies of radiation damage about the low energy X-ray are lacking circumstance in our country. Therefore, It is study that BJT (bipolar junction transistor) of one type of semiconductor elements are received radiation damage by low energy X-ray. BJT were used to the NXP semiconductor company's BC817-25 (NPN type), and Used the X-ray generator for the irradiation. Radiation damage of BJT was evaluated that confirm to analyse change of collector-emitter voltage of before and after X-ray irradiation when current gain fixed to 10. X-ray generator of tube voltage was setting 40 kVp, 60 kVp, 80 kVp, 100 kVp, 120 kVp and irradiation time was setting 180s, 360s, 540s into 180s intervals. As the result, We confirmed radiation damage in BJT by low energy X-ray under 120 keV energy, and Especially the biggest radiation damage was appeared at the 80 kVp. It is expected that ELDRS (enhanced low dose rate sensitivity) phenomenon occurs on the basis of 80 kVp. This studies expect to contribute effective dose administration of semiconductor inspection equipment using low energy X-ray, Also Research and Development of X-ray filter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.91-99
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• 2018

This paper has proposed a low-noise and high-linear RF receiver supporting TV white space from 470 MHz to 698 MHz), which is implemented in $0.13-{\mu}m$ CMOS technology. It consists of a low-noise amplifier, a RF band-pass filter, a RF amplifier, a passive down-conversion mixer, and a channel-selection low-pass filter. A low-noise amplifier and RF amplifier provide a high voltage gain to improve the sensitivity level. To suppress strong and nearby interferers, two RF filtering schemes have been performed by using a RF BPF and a down-conversion mixer. The proposed LPF has been based on the common-gate topology and adopted a bi-quad cell to achieve -24dB/oct characteristics. In addition, the RF receiver can support the overall TV band by controlling a LO frequency. The simulated results show a voltage gain of 56 dB, a noise figure of less than 2 dB, and an out-of-channel IIP3 of -2.3 dBm. It consumes 37 mA from a 1.5 V supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.6A
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• pp.634-639
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• 2006

In this paper an MMIC 2-stage power amplifier is designed and fabricated for 5GHz wireless LAN applications using $0.5{\mu}m$ gate length PHEMT transistors. The PHEMT gate width is optimized in order to meet the linearity and efficiency of the MMIC power amplifier. The $0.5{\mu}m\times600{\mu}m$ PHEMT for the drive stage and $0.5{\mu}m\times3000{\mu}m$ PHEMT for the amplification stage are the optimized sizes to achieve more than 25dBc of third order IMD at the power level of 3dB back-off from the input P1dB and more than 22dBm output power under a supply voltage of 3.3V. The two-stage MMIC power amplifier is designed to be used for the both of HIPERLAN/2 and IEEE 802.11a because of its broadband characteristics. The fabricated PHEMT MMIC power amplifier exhibits a 20.1dB linear power gain, a maximum 22dBm output power, a 24% power added efficiency under 3.3V supply voltage. The input and output on-chip matching circuits are included on a chip of $1400\times1200{\mu}m^2$.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.245-247
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• 2022

Backscattered x-ray imaging is a technology capable of acquiring an image inside an irradiated object by measuring X-rays scattered from an object. For image acquisition, the system must include an X-ray generator and a detection system for measuring scattered x-rays. The imaging device must acquire a real-time signal at sampling intervals for x-rays generated by passing through a high-speed rotating collimator, and for this purpose, a high-speed signal acquisition device is required. We developed a high-speed multi-channel signal acquisition device for converting and transmitting signals generated by the sensor unit composed of a large-area plastic scintillator and a photomultiplier tube. The developed detector is a system capable of acquiring signals at intervals of at least 15u seconds and converting and transmitting signals of up to 6 channels. And a system includes remote control functions such as high voltage, signal gain, and low level discrimination for individual calibration of each sensor. Currently, we are conducting an application test for image acquisition under various conditions.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.87-97
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• 2016

This work proposes a time-shared 10b DAC based on a two-step resistor string to minimize the effective area of a DAC channel for driving each AMOLED display column. The proposed DAC shows a lower effective DAC area per unit column driver and a faster conversion speed than the conventional DACs by employing a time-shared DEMUX and a ROM-based two-step decoder of 6b and 4b in the first and second resistor string. In the second-stage 4b floating resistor string, a simple current source rather than a unity-gain buffer decreases the loading effect and chip area of a DAC channel and eliminates offset mismatch between channels caused by buffer amplifiers. The proposed 1-to-24 DEMUX enables a single DAC channel to drive 24 columns sequentially with a single-phase clock and a 5b binary counter. A 0.9pF sampling capacitor and a small-sized source follower in the input stage of each column-driving buffer amplifier decrease the effect due to channel charge injection and improve the output settling accuracy of the buffer amplifier while using the top-plate sampling scheme in the proposed DAC. The proposed DAC in a $0.18{\mu}m$ CMOS shows a signal settling time of 62.5ns during code transitions from '$000_{16}$' to '$3FF_{16}$'. The prototype DAC occupies a unit channel area of $0.058mm^2$ and an effective unit channel area of $0.002mm^2$ while consuming 6.08mW with analog and digital power supplies of 3.3V and 1.8V, respectively.