• Title/Summary/Keyword: 전압 반전

Search Result 58, Processing Time 0.024 seconds

Steep subthreshold slope at elevated temperature in junctionless and inversion-mode MuGFET (고온에서 무접합 및 반전모드 MuGFET의 문턱전압 이하에서 급격히 작은 기울기 특성)

  • Lee, Seung-Min;Park, Jong-Tae
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.9
    • /
    • pp.2133-2138
    • /
    • 2013
  • In this paper, the variation of a steep subthreshold slope at elevated temperature in nanowire n-channel junctionless and inversion mode MuGFETs has been compared. It has been observed that the subthreshold slopes are increased with the increase of the operation temperature in junctionless and inversio-mode transistors. The variation of a subthreshold slope with operation temperature is more significant in junctionless transistor than inversion-mode transistor. The temperature dependence on the variation of a subthreshold slope for different fin widths shows a similar behavior regardless of fin width. From the temperature dependence on the variation of a subthreshold slope for different substrate biases, it has been observed that the variation of a subthreshold slope is less significant when the substrate bias was applied. It is worth noting that one can achieve a subthreshold slope of below 41mV/dec at elevated temperature of 400K using the junctionless MuGFETs with a positive substrate bias.

Comparative Analysis of PBTI Induced Device Degradation in Junctionless and Inversion Mode Multiple-Gate MOSFET (PBTI에 의한 무접합 및 반전모드 다중게이트 MOSFET의 소자 특성 저하 비교 분석)

  • Kim, Jin-Su;Hong, Jin-Woo;Kim, Hye-Mi;Lee, Jae-Ki;Park, Jong-Tae
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.1
    • /
    • pp.151-157
    • /
    • 2013
  • In this paper, a comparative analysis of PBTI induced device degradation in nanowire n-channel junctionless and inversion mode Multiple-Gate MOSFET(MuGFETs) has been performed. It has been observed that the threshold voltage is increased after PBTI stress and the threshold voltage variation of junctionless device is less significant than that of inversion mode device. However the degradation rate of junctionless device is less significant than that of inversion mode device. The activation energy of the device degradation is larger in inversion mode device than junctionless device. In order to analyze the more significant PBTI induced device degradation in inversion mode device than junctionless device, 3-dimensional device simulation has been performed. The electron concentration in inversion mode device is equal to the one in junctionless device but the electric field in inversion mode device is larger than junctionless device.

Analysis of CMOS inverter by muller and regular falsi method under the steady-state (Muller 및 regular falsi 방법에 의한 CMOS 반전 증폭기의 정상상태 해석)

  • 유은상;이은구;김태한;김철성
    • Proceedings of the IEEK Conference
    • /
    • 1998.06a
    • /
    • pp.371-374
    • /
    • 1998
  • 본 논문에서는 muller법과 regular falsi법에 의한 CMOS 반전 증폭 회로를 해석하는 방법을 제안한다. Muller법과 regular falsi법을 이용하여 회로의 절점전압과 branch 전류를 예측하였고 회로의 출력 절점에서 KCL을 만족하도록 하였다. CMOS 반전 증폭 회로의 모의실험을 수행한 결과 MEDICI에 사용된 결합법에 비해 전압특성과 전류특성은 각각 5%와 5.4%의 최대상대오차를 보였다.

  • PDF

The I-V Modelling in the Strong Inversion of MOSFET using the Multiple Box Segmentation Method (다중BOX분할기법을 이용한 MOSFET의 강반전에서의 I-V 모델링)

  • 노영준;김철성
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.26 no.5B
    • /
    • pp.677-684
    • /
    • 2001
  • 본 논문에서는 계단근사법이 아닌 다중 box분할기법을 이용하여 증가형 MOSFET의 강반전조건하에서의 I-V 모델링을 제안한다. 즉, 이온주입된 MOSFET의 강반전층의 깊이를 다중box분할기법에 의하여 구하고, 이 깊이에서의 이동전하농도 및 수직전계의존 LMS이동도 모델에 의한 이동도를 구하였다. 그리도 이들 파라메터들을 바탕으로 드레인전압에 대한 드레인 전류식을 유도하였다. 제안 드레인전류식의 타당성을 검증하기 위하여 게이트 전압을 변화시켜 가면서, 제안된 I-V 모델링에 대해 모의 실험을 수행하고 Charge-sheet 모델에 의해서 구한 드레인 전류치와 비교하였다. 모의실험수행결과 유사한 I-V 특성을 나타냄을 확인하였다.

  • PDF

Current-Voltage Characteristics with Substrate Bias in Nanowire Junctionless MuGFET (기판전압에 따른 나노와이어 Junctionless MuGFET의 전류-전압 특성)

  • Lee, Jae-Ki;Park, Jong-Tae
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.16 no.4
    • /
    • pp.785-792
    • /
    • 2012
  • In this paper, a current-voltage characteristics of n-channel junctionless and inversion mode(IM) MuGFET, and p-channel junctionless and accumulation mode(AM) MuGFET has been measured and analyzed for the application in high speed and low power switching devices. From the variation of the threshold voltage and the saturation drain current with the substrate bias voltages, their variations in IM devices are larger than junctionless devices for n-channel devices, but their variations in junctioness devices are larger than AM devices for p-channel devices. The variations of transconductance with substrate biases are more significant in p-channel devices than n-channel devices. From the characteristics of subthreshold swing, it was observed that the S value is almost independent on the substrate biases in n-channel devices and p-channel junctionless devices but it is increased with the increase of the substrate biases in p-channel AM devices. For the application in high speed and low power switching devices using the substrate biases, IM device is better than junctionless devices for n-channel devices and junctionless device is better than AM devices for p-channel devices.

A study on the fabrication of periodically poled Ti:LiNbO3 (PPLN) by the control of charge (전하량제어에 의한 주기적 분극반전 Ti:LiNbO3 (PPLN) 제작 공정에 관한 연구)

  • Kim, Won-Joung;Jung, Hong-Sik;Lee, Han-Young
    • Korean Journal of Optics and Photonics
    • /
    • v.16 no.4
    • /
    • pp.366-375
    • /
    • 2005
  • A fabrication process of periodic electric field assisted poling of Ti-diffused channel waveguides in LiNbO3 (Ti:PPLN) has been developed and improved using a periodic 180o phase inversion along the z-axis. The zig for poling inversion and the Labview program of charge control have been devised. Pulse high voltage and duty cycle were adjusted based on the estimated charge required for poling inversion. Monitoring the change of leakage current under applied voltage less than the coercive voltage also minimized a breakdown.

A Constant-gm Global Rail-to-Rail Operational Amplifier with Linear Relationship of Currents (전영역에서 선형 전류 관계를 갖는 일정 트랜스컨덕턴스 연산 증폭기의 설계)

  • Jang, Il-Gwon;Gwak, Gye-Dal;Park, Jang-U
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.37 no.2
    • /
    • pp.29-36
    • /
    • 2000
  • The principle and design of two-stage CMOS operational amplifier with rail-to-rail input and class-AB output stage is presented. The rail-to-rail input stage shows almost constant transconductance independent of the common mode input voltage range in global transistor operation region. This new technique does not make use of accurate current-voltage relationship of MOS transistors. Hence it was achieved by using simple linear relationship of currents. The simulated transconductance variation using SPICE is less the 4.3%. The proposed global two-stage opamp can operate both in strong inversion and in weak inversion. Class AB output stage proposed also has a full output voltage swing and a well-defined quiescent current that does not depend on power supply voltage. Since feedback class- AB control is used, it is expected that this output stage can be operating in extremely low voltage. The variation of DC-gain and unity-gain frequency is each 4.2% and 12%, respectively.

  • PDF

Polarity Inversion DC/DC Power Conversion Power Supply with High Voltage Step-up Ratio (고전압 변환비치 극성 반전형 DC/DC 전력 변환 전원장치)

  • Jung, Dong-Yeol;Jung, Yong-Joon;Hong, Sung-Soo;Han, Sang-Kyoo;SaKong, Sug-Chin;Roh, Chung-Wook
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.13 no.3
    • /
    • pp.196-205
    • /
    • 2008
  • A noble polarity inversion dc/dc power conversion circuit that has the high input-output voltage conversion ration characteristics is presented for high voltage DC power supply applications. The proposed circuit features the reduced voltage stresses of the component compared to those of the conventional ones. The operational principles of the proposed circuit is analyzed and comparative features are presented. The simulation results and experimental results are presented to verify the validity of the proposed circuit.

Frequency Characteristics of Coercive Field in Ferroelectric Poly(Vinylidene Fluoride-Trifluoroethylene) Thin Film (강유전성 폴리(비닐리덴 플로라이드-트리플로로에틸렌) 박막의 항전계의 주파수 특성 분석)

  • Zhang, Ting;Rahman, Sheik Abdur;Khan, Shenawar Ali;Lee, Kwang-Man;Kim, Woo Young
    • Journal of the Korean Applied Science and Technology
    • /
    • v.35 no.4
    • /
    • pp.1206-1212
    • /
    • 2018
  • In this study, the polarization reversal characteristics of thin film capacitors with a thickness of 100 nm or less fabricated with ferroelectric polymer were measured and analyzed. For the fixed film thickness, polarization reversal occurred at higher coercive fields as the applied maximum electric field increased. For the fixed maximum electric field, polarization reversal occurred at the same coercive field irrespective of the thickness of the thin film. The proportional constant values between the logarithmic electric field and the logarithmic scale frequency were $0.12{\pm}0.01$ for all measurements. As a result, the ferroelectric polymer capacitors consistently exhibited polarization reversal characteristics without any size effects up to a thickness of 40 nm. This study shows the possibility of a polymer memory device that can operate at low voltage, which is useful for predicting the behavior of a low-voltage operating polymer memory device.

Self Oscillation DC/DC Converter With High Voltage Step-up Ratio (고전압 변환 비의 자려 발진 DC/DC 컨버터)

  • Jung, Yong-Joon;Han, Sang-Kyoo;Hong, Sung-Soo;Jung, Dong-Yeol;Kim, Jin-Wook;Lee, Hyo-Bum;Roh, Chung-Wook
    • Proceedings of the KIPE Conference
    • /
    • 2008.06a
    • /
    • pp.286-288
    • /
    • 2008
  • 본 논문은 낮은 입력 DC전압에서 높은 음의 DC전압을 출력하는 높은 전환 비의 극성 반전 형 DC/DC 전력 변환 회로에 관한 것으로써, 하나의 스위치, 하나의 인덕터, 그리고 다수개의 캐패시터와 다이오드로 구성된다. 기존의 극성 반전 형 DC/DC 컨버터 회로와 비교하여, 고압 변환 트랜스포머 대신에 인덕터를 사용할 수 있어, 자기 소자의 부피 및 크기는 물론 원가저감이 가능하다. 또한 자려 발진(Self Oscillation) 방식을 사용하여 별도의 제어 IC가 필요 없으므로, 회로구성이 대단히 간단하고, 저가격의 전원 회로를 만들 수 있다. 또한 다이오드들의 전압 스트레스가 감소하여 저가격 고성능의 고압 변환장치 구현이 가능하다. 제안된 회로의 동작원리를 설명하고, 타당성을 Simulation 및 실험을 통하여 검증한다.

  • PDF