• Title/Summary/Keyword: 전압 검출기

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AC/DC flyback converter without photo-coupler having Low standby power and precise control of the output voltage (저 대기전력 및 정확한 출력전압 제어가 가능한 포토커플러 없는 AC/DC 플라이백 컨버터)

  • Jo, Kang-Ta;Heo, Tae-Won;Choi, Heung-Gyun;Kim, Hugh;Han, Sang-Kyoo
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.173-174
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    • 2014
  • 본 논문에서는 저 대기전력 구현이 가능하며 정확한 출력전압 제어가 가능한 SSR(Secondary Side Regulator) 플라이백 컨버터를 제안하였다. 제안 SSR 플라이백 컨버터는 2차 측에 control IC를 사용하여 별도의 제어기(TL431) 및 포토커플러를 제거하여 구조가 간단하고 대기모드 시 TL431의 바이어스 전류에 의한 전력소모를 줄일 수 있으므로 대기전력을 최소화 할 수 있으며 출력전압을 직접 검출하여 정확하게 출력을 제어할 수 있다. 한편 1차 측의 위치한 게이트 구동을 위해 절연된 1-2차 측간 신호를 전송하는 PET(Pulse Edge Transmitter)를 제안하였으며 제안 방식은 IC로의 직접화가 매우 용이하여 1-2차 측 IC와 제안 PET를 one-chip화 할 수 있다. 제안 회로의 타당성 검증을 위해 10W급 Adaptor의 시작품을 제작하였고, 이를 이용한 실험결과를 바탕으로 제안 시스템의 타당성을 검증한다.

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Development of Catenary Arc Detection System (전차선 아크 검측 시스템 개발)

  • Song, Sung-Gun;Lee, Teak-Hee;Cho, Seong-Jae;Moon, Chul-Yi;Park, Seong-Mo
    • Journal of the Korean Society for Railway
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    • v.13 no.1
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    • pp.37-43
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    • 2010
  • Catenary (Overhead Contact Lines) and Pantograph are used to transmit electrical energy to electric railways. An Arc occurs by unstable contact between catenary and pantograph during electric railways operation, which causes malfunctioning or even an accident. Therefore, to prevent a arc or electric contact loss are required arc detection systems with catenary maintenance capability. This paper describes developing of catenary arc detection system using photo detector in order to detect arc incidence in a indirect way. This developed system can also achieve Video-recordings and environmental conditions such as wire voltage/current, pantograph height, speed, position of electric railways, and temperature/humidity. This system have been evaluated at the section that bounds for dongdaegu from seoul. From the experimental results, the occurrence of arc and intensity of arc are mainly effected by wire voltage/current, pantograph height and speed of electric railways.

A Study on the Characteristics Analysis and Design of High Sensitivity Silicon Photodiode for Laser Detector (레이저 검출용 고감도 실리콘 포토다이오드 제조 및 특성 분석에 관한 연구)

  • Lee, Jun-Myung;Kang, Eun-Young;Park, Keon-Jun;Kim, Yong-Kab
    • The Journal of the Korea institute of electronic communication sciences
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    • v.9 no.5
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    • pp.555-560
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    • 2014
  • In order to improve spectrum sensitivity of photodiode for detection of the laser wavelength at 850 nm ~ 1000 nm of near-infrared band, this study has produced silicon-based photodiode whose area is $5000{\mu}m{\times}2000{\mu}m$, and the thickness is $280{\mu}m$. It was packed by the TO-5 type. The electrical properties of the dark currents have valued of approximately 0.1 nA for 5 V reverse bias, while the capacitance showed 32.5 pF at frequency range of 1 kHz and about 32.4 pF at the range of 200 kHz for 0 V. In addition, the rising time of output signal was as fast response as 20.92 ns for 10V. For the optical properties, the best spectrum sensitivity was 0.57 A/W for 890 nm, while it was relatively excellent value of 0.37 A/W for 1,000 nm. Over all, there were good spectrum sensitivity for this diode over the range of 870 ~ 920 nm.

Fault diagnosis system of the short circuit conditions in windings for synchronous generator (동기발전기 권선단락사고 고장진단 시스템)

  • Jang, Nakwon;Lee, SungHwan
    • Journal of Advanced Marine Engineering and Technology
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    • v.37 no.5
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    • pp.520-526
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    • 2013
  • As the increasing of capacity and technology of power facilities, rotating machines are getting higher at capacity and voltage scale. Thus the monitoring and diagnosis of generators for fault detection has attracted intensive interest. In this paper, we developed fault diagnosis system for monitoring the fault operations in bad power systems. In order to verify the performance of this fault diagnosis system, we made the small scaled testing system which has the same winding structure of the real synchronous generator. The magnetic flux patterns in air-gap of a small-scale generator under various fault states as well as a normal state are tested by hall sensors and the fault detection system.

Development of Trans-Admittance Scanner (TAS) for Breast Cancer Detection (유방암 검출을 위한 생계 어드미턴스 스캐너의 개발)

  • 이정환;오동인;이재상;우응제;서진근;권오인
    • Journal of Biomedical Engineering Research
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    • v.25 no.5
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    • pp.335-342
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    • 2004
  • This paper describes a trans-admittance scanner for breast cancer detection. A FPGA-based sinusoidal waveform generator produces a constant voltage. The voltage is applied between a hand-held electrode and a scan probe placed on the breast. The scan probe contains an 8x8 array of electrodes that are kept at the ground potential. Multi-channel precision digital ammeters using the phase-sensitive demodulation technique were developed to measure the exit current from each electrode in the array. Different regions of the breast are scanned by moving the probe on the breast. We could get trans-admittance images of resistor and saline phantoms with an anomaly inside. The images provided the information on the depth and location of the anomaly. In future studies, we need to improve the accuracy through a better calibration method. We plan to test the scanner's ability to detect a cancer lesion inside the human breast.

Development of Liquid Crystal Optic Modulation Based X-ray Dosimeter by Using CdS Sensor (CdS 센서를 이용한 액정 광변조 X-선 검출 시스템 개발)

  • Noh, Si-Cheol;Kang, Sang-Sik;Jung, Bong-Jae;Choi, Il-Hong;Kim, Hyun-Hee;Cho, Chang-Hoon;Park, Jun-Hong;Park, Ji-Koon
    • Journal of the Korean Society of Radiology
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    • v.5 no.6
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    • pp.357-361
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    • 2011
  • In this study, the liquid-crystal optical modulation X-ray detection system using a CdS which is a family of II-IV compound semiconductor was proposed. The system consist of the detector, the signal processing part, the liquid-crystal driving parts, microcontroller, and I/O parts, and was designed to be suitable for miniaturization and portable. In addition, the system can measure a wide range X-ray by using the detecting range selection. In order to evaluate the performance of the proposed system, the CdS sensor's output characteristics were confirmed in accordance with changes of dose, and excellent correlation was determined. And also, the optical penetration ratio was discussed in accordance with changes of the applied voltage by measuring the change of the liquid-crystal in accordance with changes of the applied voltage. Through these results, the characteristics of the liquid-crystal optical modulation system such as the excellent reproducibility and the noise immunity were confirmed. And we considered that the CdS cell-based liquid-crystal optical modulated portable X-ray detection system could be applied to compact, low-cost, portable system.

Temperature Compensation of NDIR $CO_{2}$ Gas Sensor Implemented with ASIC Chip (ASIC 칩 내장형 비분산 적외선 이산화탄소 가스센서의 온도보상)

  • Yi, Seung-Hwan;Park, Jong-Seon
    • Journal of the Korean Institute of Gas
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    • v.11 no.1 s.34
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    • pp.40-45
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    • 2007
  • This paper describes NDIR $CO_{2}$ gas sensor that shows the characteristics of temperature compensation. It consists of novel optical cavity that has two elliptical mirrors and a thermopile that includes ASIC chip in the same metal package for the amplification of detector output voltage and temperature sensor. The newly developed sensor module shows high accuracy ($less\;than {\pm}40\;ppm$) throughout the measuring concentration of $CO_{2}$ gas from 0 ppm to 2,000 ppm. After implementing the calculation methods of gas concentration, which is based upon the experimental results, the sensor module shows high accuracy less than ${\pm}5\;ppm$ error throughout the measuring temperature range ($15^{\circ}C\;to\;35$^{\circ}C$) and gas concentrations with self-temperature compensation.

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Implementation of Pattern Generator for Efficient IDDQ Test Generation in CMOS VLSI (CMOS VLSI의 효율적인 IDDQ 테스트 생성을 위한 패턴 생성기의 구현)

  • Bae, Seong-Hwan;Kim, Gwan-Ung;Jeon, Byeong-Sil
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.4
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    • pp.292-301
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    • 2001
  • IDDQ Testing is a very effective testing method to detect many kinds of physical defects occurred in CMOS VLSI circuits. In this paper, we consider the most commonly occurring bridging faults in current CMOS technologies and develop pattern generator for IDDQ testing using efficient IDDQ test algorithms. The complete set of bridging faults between every pair of all nodes(internal and external nodes) within circuit under test is assumed as target fault model. The merit of considering the complete bridging fault set is that layout information is not necessary. Implemented test pattern generator uses a new neighbor searching algorithm and fault collapsing schemes to achieve fast run time, high fault coverage, and compact test sets. Experimental results for ISCAS benchmark circuits demonstrate higher efficiency than those of previous methods.

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Design of paraleel adder with carry look-ahead using current-mode CMOS Multivalued Logic (전류 모드 CMOS MVL을 이용한 CLA 방식의 병렬 가산기 설계)

  • 김종오;박동영;김흥수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.3
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    • pp.397-409
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    • 1993
  • This paper proposed the design methodology of the 8 bit binary parallel adder with carry book-ahead scheme via current-mode CMOS multivalued logic and simulated the proposed adder under $5{\mu}m$ standard IC process technology. The threshold conditions of $G_K$ and $P_K$ which are needed for m-valued parallel adder with CLA are evaluated and adopted for quaternary logic. The design of quaternary CMOS logic circuits, encoder, decoder, mod-4 adder, $G_K$ and $P_K$ detecting circuit and current-voltage converter is proposed and is simulated to prove the operations. These circuits are necessary for binary arithmetic using multivalued logic. By comparing with the conventional binary adder and the CCD-MVL adder, We show that the proposed adder cab be designed one look-ahead carry generator with 1-level structure under standard CMOS technology and confirm the usefulness of the proposed adder.

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A Design of DLL-based Low-Power CDR for 2nd-Generation AiPi+ Application (2세대 AiPi+ 용 DLL 기반 저전력 클록-데이터 복원 회로의 설계)

  • Park, Joon-Sung;Park, Hyung-Gu;Kim, Seong-Geun;Pu, Young-Gun;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.4
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    • pp.39-50
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    • 2011
  • In this paper, we presents a CDR circuit for $2^{nd}$-generation AiPi+, one of the Intra-panel Interface. The speed of the proposed clock and data recovery is increased to 1.25 Gbps compared with that of AiPi+. The DLL-based CDR architecture is used to generate the multi-phase clocks. We propose the simple scheme for frequency detector (FD) to mitigate the harmonic-locking and reduce the complexity. In addition, the duty cycle corrector that limits the maximum pulse width is used to avoid the problem of missing clock edges due to the mismatch between rising and falling time of VCDL's delay cells. The proposed CDR is implemented in 0.18 um technology with the supply voltage of 1.8 V. The active die area is $660\;{\mu}m\;{\times}\;250\;{\mu}m$, and supply voltage is 1.8 V. Peak-to-Peak jitter is less than 15 ps and the power consumption of the CDR except input buffer, equalizer, and de-serializer is 5.94 mW.