• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.116-116
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• 2018

부식은 재료와 사용 환경과의 상호작용에 의한 결과로서 일반적으로 두께의 감소와 균열의 발생 및 파손 등의 문제로 나타난다. 특히 사용환경 중에서 해수 분위기는 금속의 부식에 가장 유리한 조건이다. 따라서 해양환경 중 항만이나 조선 및 해양 산업 등에 많이 이용되는 강 구조물은 이에 대응하기 위하여 도장방식이나 음극방식을 사용하고 있다. 여기서 음극방식은 피방식체를 일정전위로 음극 분극하는 원리로써 외부전원을 인가하거나 비전위의 금속을 전기적으로 연결하여 방식하는 방법이다[1]. 한편, 해수 중에서 이와 같은 원리로 음극방식 할 경우에는 피방식체인 강재표면에 부분적으로 칼슘 또는 마그네슘 화합물 등의 생성물이 부착하는 현상을 볼 수 있게 된다. 이와 같이 수산화마그네슘($Mg(OH)_2$)및 탄산칼슘($CaCO_3$)을 주성분으로 하여 석출되는 석회질 피막(calcareous deposits)은 피방식체에 유입되는 음극방식 전류밀도를 감소시켜 주거나 물리적 장벽의 역할을 함으로써 외부의 산소와 물 등 부식환경으로부터 소지금속을 보호한다[2]. 그러나 석회질 피막은 소지금속과의 결합력, 막의 균일한 분포, 내식성 및 제작시간의 단축 등 해결해야 할 과제가 있다. 또한 여러 가지 환경 조건 등의 영향을 받아 그 피막의 형성 정도도 가늠하기 어렵기 때문에 음극방식 설계 시 그 정도에 따른 영향을 고려-반영하기가 곤란하다. 따라서 본 연구에서는 석출속도, 밀착성 및 내식특성을 향상시키기 위해 전착프로세스를 통해 해수 중 기체를 용해시켜 석회질 피막을 제작하고 막의 결정구조 제어 및 특성을 분석-평가하였다. 본 연구에 사용된 강 기판(Steel Substrate)은 일반구조용강(KS D 3503, SS400)을 사용하였으며, 외부전원은 정류기(Rectifier, xantrex, XDL 35-5T)를 사용하여 3 및 $5A/m^2$의 조건으로 인가하였다. 양극의 경우에는 해수에 녹아있는 이온 이외에 다른 성분들이 환원되는 것을 방지하기 위해 불용성 양극인 탄소봉(Carbon Rod)을 사용하였다. 이때 석출속도, 밀착성 및 내식특성 향상을 위해 해수에 주입한 기체의 양은 0.5 NL/min였으며, 기판 근처에 고정하여 음극 부근에서의 반응을 유도하였다. 각 조건별로 제작된 막의 표면 모폴로지, 조성원소 및 결정구조 분석을 실시하였으며, 석회질 피막의 밀착성과 내식특성을 평가하기 위해 규격에 따른 테이핑 테스트(Taping Test, ISO 2409)와 3 % NaCl 용액에서 전기화학적 양극 분극 시험을 진행하여 제작된 막의 내구성과 내식성을 분석-평가하였다. 시간에 따른 전착막의 외관관찰 결과 전류밀도의 증가와 함께 상대적으로 많은 피막이 형성되었고, 용해시킨 기체에 의해 더 치밀하고 두터운 피막이 형성됨을 확인할 수 있었다. 성분 및 결정구조 분석 결과 $Mg(OH)_2$ 성분의 Brucite 및 $CaCO_3$ 성분의 Calcite 및 Aragonite 구조를 확인하였으며, 용해시킨 기체의 영향으로 $CaCO_3$ 성분의 Aragonite 구조가 상대적으로 많이 검출되었다. 밀착성 및 내식성 평가를 실시한 결과 해수 중 용해시킨 기체에 의해 제작한 시편의 경우 견고하고 화학적 친화력이 높은 Aragonite 결정이 표면을 치밀하게 덮어 전해질로부터 산소와 물의 침입을 차단하는 역할을 하여 기체를 용해시키지 않은 3 및 $5A/m^2$ 보다 비교적 우수한 밀착성 및 내식 특성을 보이는 것으로 사료된다.

• Applied Chemistry for Engineering
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• v.27 no.4
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• pp.439-443
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• 2016

In this report, $MnO_2$ nanoparticle-deposited functionalized graphene sheets were prepared and their superior electrochemical performances were demonstrated by cyclic voltammetry, galvanostatic charge-discharge, and impedance analysis. Ionic liquids were employed to functionalize the surface of reduced graphene oxides (RGOs), leading to prevention of the aggregation of RGO sheets and abundant growth sites for deposition of $MnO_2$ nanoparticles. As-prepared $MnO_2/RGO$ nanocomposites were characterized using scanning electron microscope, transition electron microscope, X-ray photoelectron spectroscopy, and X-ray diffraction. Electrochemical properties of $MnO_2/RGO$ electrode were evaluated using $Na_2SO_4$ electrolyte under a three-electrode system. The $MnO_2/RGO$ electrode showed a high specific capacitance (251 F/g), a high rate capability (80.5% retention), and long-term stability (93.6% retention).

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.5
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• pp.433-441
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• 1999

This paper presents a S-FES(Superconducting magnetic becuing Flywheel Energy Storage System) for the p purpose of replacing battery used to store the energy. Especially, the design elements of FES, such as the b beming, wheel mateηaI, and power converter, etc., are described. The design and manufacturing techniques of t the controllable IXlwer converter are proposed to generate the sinusoidal output current in the high speed operation and to get the const빠synchronous motor with halbach cuTay of high coesive I\d-Fe-B permanent magnet is used as the driver of F FES. The proposed S-FES system shows the stable rotation characteristics at high speed range about l 10,000[rpm]. To verify the validity of proposed system, the comparative study with the conventional ball b beming s~rstem is proceeded and it is well confirmed with the result of the lower friction losses of S-FES S system.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.4
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• pp.29-38
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• 2009

The GHP(Gas Heat Pump) is an efficient cooling;11eating system in which a compressor is driven by a gas engine and is brodening its application to the facilities such as schools and office buildings. It is difficult to control the GHP system because of slow response, big time constant and time variant system. These nonlinear loads generate harmonic currents and create distortions on the sinusoidal voltage of the power system Harmonic field measurements have shown that the harmonic contents of a waveform varies with time. A cumulative probability approach is the most commonly used method to solve time varying harmonics. This paper provides an in depth analysis on harmonics field measurement of the GHP loads, harmonic assessment by me 61000-3-2, and harmonic simulation and harmonic filter application using EDSA program for the case study system.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.45 no.11
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• pp.907-913
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• 2017

The performance of a spark jet driven by pulsed-arc plasma was investigated experimentally for various energy input. A high-speed jet (about 330 m/s) was obtained by rapid gas heating produced by 37 mJ of deposited energy per pulse. The peak velocity and penetration distance of the jet were proportional to the deposited power and the deposited energy per pulse, respectively. A smaller orifice diameter produces a higher velocity jet at lower energy levels. For the same deposited energy, higher-current pulses produce a higher jet velocity than higher-pulse-width pulses. A total deposited energy of about 10 mJ per pulse with a pulse duration of about $10{\mu}s$ was found to be the optimum for energy- efficient operation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.4
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• pp.1797-1805
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• 2012

In this paper, Power LED(Light Emitting Diodes) is studied to driver as a new lighting system in the spotlight, replacing a large existing lighting system with fluorescent and incandescent lighting. To take advantage a variety of DC power as the boost DC-DC converter design specifications through the inductor L and capacitor C through PSPICE to calculate the best estimate of the value. Converter's switching frequency is 50[kHz], the first Duty Rate was made to increase gradually depending on the value of the detection were, 10[%] in the output voltage. As a result, the simulated Boost Power LED driver characteristics is in comparison with the design specifications, 5[%] or less as the error was approximated. So, when input 15[V] were offered, a stable output 24[V] were obtained, and Dimming Control through the adjustment of brightness and current consumption were obtained to possible result.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.57-66
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• 1999

This paper describes a 12b, 50 Msample/s CMOS AID converter using an acquisition-time minimization technique for the high-speed sampling rate of 50 MHz level. The proposed ADC is implemented in a $0.35\mu\textrm{m}$ double-poly five-metal n-well CMOS technology and adopts a typical multi-step pipelined architecture to optimize sampling rate, resolution, and chip area. The speed limitation of conventional pipelined ADCs comes from the finite bandwidth and resulting speed of residue amplifiers. The proposed acquisition-time minimization technique reduces the acquisition time of residue amplifiers and makes the waveform of amplifier outputs smooth by controlling the operating current of residue amplifiers. The simulated power consumption of the proposed ADC is 197 mW at 3 V with a 50 MHz sampling rate. The chip size including pads is $3.2mm\times3.6mm$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.3 s.357
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• pp.20-25
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• 2007

The periodic domain-inversion in the selective areas of $Ti:LiNbO_3$ Mach-Zender waveguides was performed and band-pass modulators and single sideband (SSB) modulators were fabricated by using domain-reversal. The domain wall velocity was precisely controlled by real-time analysis of a poling-induced response current under an applied voltage. The domain wall velocity was significantly affected by the crystal orientation of the domain wall propagation which influenced the final domain geometry. In a certain case, the decomposition of $LiNbO_3$ crystal was observed, for example, under the condition of too fast domain wall propagation. The fabricated band-pass modulator with a periodic domain-inversion structure showed the maximum modulation efficiency at 30.3 GHz with 5.1 GHz 3dB-bandwidth, and SSB modulator was measured to show 33 dB USB suppression over LSB at 5.8 GHz RF.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.3 s.357
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• pp.26-34
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• 2007

This Paper describes a chip design technique for body composition analyzer based on the BIA (Bioelectrical Impedance Analysis) method. All the functions of signal forcing circuits to the body, signal detecting circuits from the body, Micom, SRAM and EEPROMS are integrated in one chip. Especially, multi-frequency detecting method can be applied with selective band pass filter (BPF), which is designed in weak inversion region for low power consumption. In addition new full wave rectifier (FWR) is also proposed with differential difference amplifier (DDA) for high performance (small die area low power consumption, rail-to-rail output swing). The prototype chip is implemented with 0.35um CMOS technology and shows the power dissipation of 6 mW at the supply voltage of 3.3V. The die area of prototype chip is $5mm\times5mm$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.56-63
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• 2008

This paper describes a 12 bit 1GS/s current mode segmented DAC for WCDMA communication. The proposed circuit in this paper employes segmented structure which consists of 4bit binary weighted structure in the LSB and 4bit thermometer decoder structure in the mSB and MSB. The proposed DAC uses delay time compensation circuits in order to suppress performance decline by delay time in segmented structure. The delay time compensation circuit comprises of phase frequency detector, charge pump, and control circuits, so that suppress delay time by binary weighted structure and thermometer decoder structure. The proposed DAC uses CMOS $0.18{\mu}m$ 1-poly 6-metal n-well process, and measured INL/DNL are below ${\pm}0.93LSB/{\pm}0.62LSB$. SFDR is approximately 60dB and SNDR is 51dB at 1MHz input frequency. Single DAC's power consumption is 46.2mW.