• Title/Summary/Keyword: 전류이득

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A 5.8GHz SiGe Down-Conversion Mixer with On-Chip Active Batons for DSRC Receiver (DSRC수신기를 위한 능동발룬 내장형 5.8GHz SiGe 하향믹서 설계 및 제작)

  • 이상흥;이자열;이승윤;박찬우;강진영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.4A
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    • pp.415-422
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    • 2004
  • DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz down-conversion mixer for DSRC communication system was designed and fabricated using 0.8 ${\mu}{\textrm}{m}$ SiGe HBT process technology and RF/LO matching circuits, RF/LO input balun circuits, and If output balun circuit were all integrated on chip. The chip size of fabricated mixer was 1.9 mm${\times}$1.3 mm and the measured performance was 7.5 ㏈ conversion gain, -2.5 ㏈m input IP3, 46 ㏈ LO to RF isolation, 56 ㏈ LO to IF isolation, current consumption of 21 mA for 3.0 V supply voltage.

A 5.8 GHz SiGe Up-Conversion Mixer with On-Chip Active Baluns for DSRC Transmitter (DSRC 송신기를 위한 능동발룬 내장형 5.8 GHz SiGe 상향믹서 설계 및 제작)

  • Lee Sang heung;Lee Ja yol;Kim Sang hoon;Bae Hyun cheol;Kang Jin yeong;Kim Bo woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.4A
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    • pp.350-357
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    • 2005
  • DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz up-conversion mixer for DSRC communication system was designed and fabricated using 0.8 m SiGe HBT process technology and IF/LO/RF matching circuits, IF/LO input balun circuits, and RP output balun circuit were all integrated on chip. The chip size of fabricated mixer was $2.7mm\times1.6mm$ and the measured performance was 3.5 dB conversion gain, -12.5 dBm output IP3, 42 dB LO to If isolation, 38 dB LO to RF isolation, current consumption of 29 mA for 3.0 V supply voltage.

Miniaturization of Microstrip Antenna using Iris (Iris를 이용한 마이크로스트립 안테나의 소형화)

  • Seo Jeong-Sik;Woo Jong-Myung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.10 s.89
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    • pp.922-930
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    • 2004
  • In this paper, the 3-dimensional microstrip antenna, where the lis is attached near the patch, on the pound and both patch and ground in zigzag, is designed and fabricated to miniaturize size of antenna. The path of surface current and permittivity in patch are increased because of attached Iris near the patch, on the pound and patch and found. In particula., the maximum size reduction effect among the three-type of $79.1\%$(17 mm$\times$90 mm) was presented in zigzag-type compared with the rectangular microstrip patch antenna(MPA) with a height of 9 mm at the resonant frequency of 1.575 GHz. The gain showed -1.15 dBd, -10 dB bandwidth showed 6.2$\%$(98 MHz), and HPBW of E-plane showed $154^{\circ}$. As that result we could confirm that the 3-dimensional structure with attached Irises is the proper form for the miniaturization of microstrip antenna.

32-Channel Bioimpedance Measurement System for the Detection of Anomalies with Different Resistivity Values (저항률이 다른 내부 물체의 검출을 위한 32-채널 생체 임피던스 측정 시스템)

  • 조영구;우응제
    • Journal of Biomedical Engineering Research
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    • v.22 no.6
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    • pp.503-510
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    • 2001
  • In this paper. we describe a 32-channel bioimpedance measurement system It consists of 32 independent constant current sources of 50 kHz sinusoid. The amplitude of each current source can be adjusted using a 12-bit MDAC. After we applied a pattern of injection currents through 32 current injection electrodes. we measured induced boundary voltages using a variable-gain narrow-band instrumentation amplifier. a Phase-sensitive demodulator. and a 12-bit ADC. The system is interfaced to a PC for the control and data acquisition. We used the system to detect anomalies with different resistivity values in a saline Phantom with 290mm diameter The accuracy of the developed system was estimated as 2.42% and we found that anomalies larger than 8mm in diameter can be detected. We Plan to improve the accuracy by using a digital oscillator improved current sources by feedback control, Phase-sensitive A/D conversion. etc. to detect anomalies smaller than 1mm in diameter.

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Characteristics of Insertion Loss of Transmission Line with Equal Line Length Due to a Rectangular Aperture Size in a Backplane (백플레인 개구의 크기 변화에 따른 대칭 전송선로의 삽입 손실)

  • Jung, Sung-Woo;Cho, Jun-Ho;Kim, Ki-Chai
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.12
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    • pp.2518-2524
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    • 2009
  • This paper presents the backplane effects due to a rectangular aperture size for two-wire transmission line with equal line length crossing the changeable rectangular aperture in an infinite ground backplane. It is used to determine the characteristics of the backplane insertion loss of the transmission line from the load section in accordance with the backplane aperture size. The results show that the insertion gain and insertion loss are obtained for the specific frequency range when the transmission line is closed to the backplane aperture size. The insertion loss is decreased that the aperture horizontal length and vertical length is more than a=50 mm and b=20 mm. The measurements of insertion loss are performed to verify the theoretical analysis.

A 13b 100MS/s 0.70㎟ 45nm CMOS ADC for IF-Domain Signal Processing Systems (IF 대역 신호처리 시스템 응용을 위한 13비트 100MS/s 0.70㎟ 45nm CMOS ADC)

  • Park, Jun-Sang;An, Tai-Ji;Ahn, Gil-Cho;Lee, Mun-Kyo;Go, Min-Ho;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.3
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    • pp.46-55
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    • 2016
  • This work proposes a 13b 100MS/s 45nm CMOS ADC with a high dynamic performance for IF-domain high-speed signal processing systems based on a four-step pipeline architecture to optimize operating specifications. The SHA employs a wideband high-speed sampling network properly to process high-frequency input signals exceeding a sampling frequency. The SHA and MDACs adopt a two-stage amplifier with a gain-boosting technique to obtain the required high DC gain and the wide signal-swing range, while the amplifier and bias circuits use the same unit-size devices repeatedly to minimize device mismatch. Furthermore, a separate analog power supply voltage for on-chip current and voltage references minimizes performance degradation caused by the undesired noise and interference from adjacent functional blocks during high-speed operation. The proposed ADC occupies an active die area of $0.70mm^2$, based on various process-insensitive layout techniques to minimize the physical process imperfection effects. The prototype ADC in a 45nm CMOS demonstrates a measured DNL and INL within 0.77LSB and 1.57LSB, with a maximum SNDR and SFDR of 64.2dB and 78.4dB at 100MS/s, respectively. The ADC is implemented with long-channel devices rather than minimum channel-length devices available in this CMOS technology to process a wide input range of $2.0V_{PP}$ for the required system and to obtain a high dynamic performance at IF-domain input signal bands. The ADC consumes 425.0mW with a single analog voltage of 2.5V and two digital voltages of 2.5V and 1.1V.

A Study on Wireless Broadband Internet RF Down Converter Design and Production (휴대무선인터넷 RF 하향 변환기 설계 및 제작에 관한 연구)

  • Lee, Chang-Hee;Won, Young-Jin;Lee, Jong-Yong;Lee, Sang-Hun;Lee, Won-Seok;Ra, Keuk-Hwan
    • 전자공학회논문지 IE
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    • v.45 no.1
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    • pp.31-37
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    • 2008
  • A Wibro RF down converter of 2.3GHz band is designed and implemented in this paper. The problems that can occur in the receiver LNA(Low Noise Amplifier) to minimize additional purposes. In addition, 2.3GHz band from the 75 MHz downward to minimize the losses in the process, transform and improve efficiency, and achieve stable characteristics can be used to make high frequency characteristics of the device. Wibro repeater uses a TDMA(Time Division Multiplexing Access) method is needed because the RF switch. Production criterion specification, the input voltage from +8 V 1.2A of current consumption, 60dB gain and the noise figure of less than 2.5dB, VSWR(Voltage Standing Wave Ratio) less than 1.5, more than IMD(Inter Modulation Distortion) 60dB satisfied. Environmental conditions ($-20^{\circ}C$ to $70^{\circ}C$) to pass the test of reliability in a long time, that seemed crafted Wibro down converter be applied to the Wibro repeater.

A Calibration-Free 14b 70MS/s 0.13um CMOS Pipeline A/D Converter with High-Matching 3-D Symmetric Capacitors (높은 정확도의 3차원 대칭 커패시터를 가진 보정기법을 사용하지 않는 14비트 70MS/s 0.13um CMOS 파이프라인 A/D 변환기)

  • Moon, Kyoung-Jun;Lee, Kyung-Hoon;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.12 s.354
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    • pp.55-64
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    • 2006
  • This work proposes a calibration-free 14b 70MS/s 0.13um CMOS ADC for high-performance integrated systems such as WLAN and high-definition video systems simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs signal insensitive 3-D fully symmetric layout techniques in two MDACs for high matching accuracy without any calibration. A three-stage pipeline architecture minimizes power consumption and chip area at the target resolution and sampling rate. The input SHA with a controlled trans-conductance ratio of two amplifier stages simultaneously achieves high gain and high phase margin with gate-bootstrapped sampling switches for 14b input accuracy at the Nyquist frequency. A back-end sub-ranging flash ADC with open-loop offset cancellation and interpolation achieves 6b accuracy at 70MS/s. Low-noise current and voltage references are employed on chip with optional off-chip reference voltages. The prototype ADC implemented in a 0.13um CMOS is based on a 0.35um minimum channel length for 2.5V applications. The measured DNL and INL are within 0.65LSB and l.80LSB, respectively. The prototype ADC shows maximum SNDR and SFDR of 66dB and 81dB and a power consumption of 235mW at 70MS/s. The active die area is $3.3mm^2$.

A Study on Design and Fabrication of High Isolation W-band MIMIC Single-balanced Mixer (높은 격리도 특성의 W-밴드용 MIMIC 단일 평형 주파수 혼합기의 설계 및 제작 연구)

  • Yi, Sang-Yong;Lee, Mun-Kyo;An, Dan;Lee, Bok-Hyung;Lim, Byeong-Ok;Rhee, Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.11
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    • pp.48-53
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    • 2007
  • In this paper, a high LO-RF isolation W-band MIMIC single-balanced mixer was designed and fabricated using a branch line coupler and a ${\lambda}/4$ transmission line. The W-band MIMIC single-balanced mixer was designed using the $0.1\;{\mu}m$ InGaAs/InAlAs/GaAs Metamorphic HEMT diode. The fabricated MHEMT was obtained the cut-off frequency($f_T$) of 154 GHz and the maximum oscillation frequency($f_{max}$) of 454 GHz. The designed MIMIC single-balanced mixer was fabricated using $0.1\;{\mu}m$ MHEMT MIMIC process. From the measurement, the conversion loss of the single-balanced mixer was 12.8 dB at an LO power of 8.6 dBm. P1 dB(1 dB compression point) of input and output were 5 dBm and -8.9 dBm, respectively. The LO-RF isolations of single-balanced mixer was obtained 37.2 dB at 94 GHz. We obtained in this study a higher LO-RF isolation compared to some other balanced mixers in millimeter-wave frequencies.

Design of a Internal Loop Antenna for Multi-band Mobile Handset Applications (다중 대역 이동 통신 단말기용 내장형 루프 안테나 설계)

  • Lee Young-Joong;Lee Jin-Sung;Jung Byungwoon;Park Myun-Joo;Lee Byungje
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.9 s.100
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    • pp.917-925
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    • 2005
  • In this paper, the quad-band antenna for mobile handsets is proposed and developed. The operating frequency bands include GSM(880 MHz${\~}$960 MHz), GPS(1,575 MHz$\pm$10 MHz), DCS(1,710 MHz${\~}$l,880MHz), and PCS(1,850 MHz${\~}$l,990 MHz). The proposed antenna consists of a feed line, a shorting post, and a radiating element of the feed loop. The multi-band operation is achieved by using the fundamental and higher resonant modes of the radiating element. Based on analysis of the current distribution on the radiator, the resonant frequency of each mode can be adjusted by adding the different sizes of slots on the radiator. The radiator of the feed loop is designed to be symmetrical so that the energy is symmetrically distributed on the radiator, which results in omni-directional radiation pattern. The ground plane under the radiator is removed in order to improve the bandwidth. The measured impedance bandwidths are $10.1\%$ in GSM band(VSWR<2.5), $26.8\%$ in GPS band, and DCS/US-PCS bands(VSWR<2.5), respectively. The maximum gains on the H-plane of the fabricated antenna are measured about -0.37 dBi${\~}$2.55 dBi for all operating frequency bands.