• Journal of Sensor Science and Technology
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• v.3 no.3
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• pp.16-21
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• 1994

A 3-terminal pin-type photosensor with gate contrail is fabricated using standard silicon CMOS IC process. The photosensor of a $100{\mu}m{\times}120{\mu}m$ size has dark current less than 1nA and its breakdown voltage is -14V with a depletion capacitance 0.75 pF at -5V reverse bias. Responsivity at 0V gate voltage is 0.25A/W at $0.633{\mu}m$ wavelength, 0.19A/W at $0.805{\mu}m$. Responsivity increases with increasing gate voltage. The integrated circuit of photosensor and CMOS inverter shows $22K{\Omega}$ transimpedance and photocurrent of $90{\mu}A$ switchs the output state of digital inverter without additional amplifier.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.9
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• pp.2003-2008
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• 2012

A drive system is necessary to operate LED by an LED illumination system. Because Switched Mode Power Supply (SMPS) is higher in efficiency in the large capacity than Linear Regulator, it is used mainly and controls this in an analog form or digital method. A MCU and a DSP of the digital control central processing unit were higher in a unit price than existing analog control chip, so that an approach was not easy for application of SMPS. But it can take the earnings by it lets you integrate various digital control features like an LED illumination system in one MCU, and realizing a whole system. In this paper, we suggest the algorithm that can improve LED driving current in applying such a digital control method using low-priced type MCU.

• Journal of Biomedical Engineering Research
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• v.20 no.2
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• pp.205-212
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• 1999

When we want to observe and record a patient's EEG in an operating room, the operation of electrosurgical unit(ESU) causes undesirable artifacts with high frequency and high voltage. These artifacts make the amplifiers of the conventional EEG system saturated and prevent the system from measuring the EEG signal. This paper describes a high-performance bipolar EEG amplifier for a CSA (compressed spectral array ) system with reduced ESU artifacts. The designed EEG amplifier uses a balanced filter to reduce the ESU artifacts, and isolates the power supply and the signal source of the preamplifier from the ground to cut off the current from the ESU to the amplifier ground. To cancel the common mode noise in high frequency, a high CMRR(common mode rejection ratio) diffferential amplifier is used. Since the developed bipolar EEG amplifier shows high gain, low noise, high CMRR, high input impedance, and low thermal drift, it is possible to observe and record more clean EEG signals in spite of ESU operation. Therefore the amplifier may be applicable to a high-fidelity CSA system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.1
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• pp.14-19
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• 2016

In this paper, a wideband slot antenna with corrugated structure antenna is proposed. The proposed antenna consists of a ground plane with corrugated slot and microstrip feed-line. Even with a limited dimension of $70{\times}70{\times}1.6mm$, the proposed antenna has wide bandwidth due to the longer current path formed by the corrugated slot structure. Measured bandwidth(10 dB return loss) and fractional bandwidth of the proposed antenna are 2,180 MHz(2.5~4.68 GHz) and 60.7 % at the center frequency of 3.59 GHz. The proposed antenna has an omni-directional radiation pattern and measured gains and average efficiency were 3.48~5.83 and dBi, 81.55 %, respectively.

• The Journal of the Korea institute of electronic communication sciences
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• v.13 no.1
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• pp.15-22
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• 2018

In this paper, a microstrip-fed triple-band monopole antenna for WLAN/WiMAX applications was proposed. The proposed antenna is consist of two arc-shaped and one strip line structure, then get the three current path and then designed in order to get triple resonant characteristics. We carried out simulation about parameters. Taking account of coupling effect, Adjusted the length of the two arc-shaped and one strip line, we get the optimized parameters. The proposed antenna is fabricated on an FR-4 substrate, the dielectric constant is 4.4, and total size is $23.5mm(W1){\times}32.0mm(L1){\times}1.0mm(t)$, and its proposed antenna size is $21.0mm(W6){\times}31.0mm(L7)$. From the measured results, return loss of the proposed antenna satisfied return loss 927 MHz (1.844~2.771 GHz), 926 MHz (3.33~4.256 GHz), and 1,415 MHz (5.13~6.545 GHz). And measured results of gain and radiation patterns displayed for operating bands.

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.1
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• pp.43-50
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• 2016

In this paper, new automatic LC calibrator is proposed for realizing a passive LC filter with almost constant frequency characteristic regardless of the PVT variations. The SAW-less GPS RX front-end is implemented using a 65nm CMOS process using the proposed LC calibrator. Also, new dual-mode low noise amplifier (LNA) structure is proposed to generate the RF signal required for the LC calibrator. The characteristics of the implemented GPS RX front-end show the voltage gain of about 42.5 dB, noise figure of below 1.35 dB, the blocker input P1dB of -24 dBm in case of the worst blocker signal at 1710 MHz frequency, while it consumes 7 mA current at 1.2 V power supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.6
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• pp.427-434
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• 2013

In this paper, the design and layout of a 2.5 Gbps arrayed VCSEL driver for optical transceiver having arrayed multi-channel of integrating module is confirmed. In this paper, a 4 channel 2.5 Gbps VCSEL (vertical cavity surface emitting laser) driver array with automatic optical power control is implemented using $0.18{\mu}m$ CMOS process technology that drives a $1550{\mu}m$ high speed VCSEL used in optical transceiver. To enhance the bandwidth of the optical transmitter, active feedback amplifier with negative capacitance compensation is exploited. We report a distinct improvement in bandwidth, voltage gain and operation stability at 2.5Gbps data rate in comparison with existing topology. The 4-CH chip consumes only 140 mW of DC power at a single 1.8V supply under the maximum modulation and bias currents, and occupies the die area of $850{\mu}m{\times}1,690{\mu}m$ excluding bonding pads.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.8
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• pp.1-11
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• 2002

A multi-section DFB-LD shows optical bistability subject to externally injected light signal, then it has potential applications such as wavelength conversion and optical logic gates. In this paper, we have studied the optical bistability in multi-section DFB-LD using split-step time-domain model. It is confirmed that the multi-section DFB-LD, which is excited inhomogeneously, shows bistability. The optical bistable characteristics are investigated when input light is injected into a absorptive region. Simulation results show that multi-section DFB-LD works as a flip-flop depending on the set-reset optical pulse which has a few ns in switching time and a few pj in switching energy, so that it can act as a optical logic device. Besides, if we change the carrier lifetime and the differential gain coefficient, it is expected that the response time of optical output signal can be reduced.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.2
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• pp.220-223
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• 2016

This letter proposes a low noise amplifier which has low noise figure and high linearity simultaneously using a cascode structure with an additional transistor. The proposed structure minimizes the noise source by using optimizing transistor sizes and also improves linearity from the current bleeding technique. The device was fabricated in a $0.5{\mu}m$ GaAs pHEMT process and has noise figure of 1.1 dB, a voltage gain of 15.0 dB, an $OIP_3$ of 30.8 dBm and an input/output return loss of 11.6 dB/10.4 dB from 1.8 to 2.6 GHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.10
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• pp.1837-1844
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• 2016

This paper proposes an antenna of the fork type structure that operates in the UWB (Ultra Wide Band) frequency band (3.1 ~ 10.6 GHz). The proposed antenna is attached a circular patch in order to obtain the UWB band characteristics to the fork-type patch antenna. The ground plane is implemented in a arc-shape configuration. The effect of various parameters of the modified fork type radiating patch and partial arc ground plane for UWB operation is investigated. The proposed antenna is made of $34.0{\times}50.0{\times}1.0mm^3$ and is fabricated on the permittivity 4.4 FR-4 substrate. The experiment results shown that the proposed antenna obtained the -10 dB impedance bandwidth 8200 MHz (2.7 ~ 10.9 GHz) covering the UWB bands. This result satisfied the characteristics of ultra-wideband and the proposed antenna will be applicable to an ultra wideband system.