• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.1
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• pp.203-209
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• 2019

In this work, a new land-specific resistance measuring device (GM) and a measuring probe (Grounding Rod) are connected to the WENNER quadrant as power-line communication (PLC). In groups of two (P1,P2) probes, five to ten probes are installed in series on the ground at intervals of 1m, 2m, 4m, 8m, and 16m, respectively. If the PLC signal from the GMD is detected by the receiver of the Probe 1 (P1) for measurement, the minute voltage and current for measurement flow from the PSD (power supply) attached to the probe to the ground, and then, through the soil between P1 and P2, enters the Probe 1 (P2). The resistance value is then measured by the principle of voltage drop due to ground resistance. Measure the earth resistance every T seconds up to 1 trillion and store the measured data on the Arduino Server mounted on the main equipment. Stored measurement data can be derived from formulas by Ohm's Law and from inherent resistance (here,). Data obtained in real time will be linked to CDGES programs installed on Main PC, enabling data analysis and real-time monitoring of the ground environment on land. In addition, a three-dimensional display is possible with 3D graph support by identifying seasonal characteristics such as temperature and humidity of land (soils). The limitations of the study will require specific application measures of Test Bed for commercial access to a model that has been developed and operated experimentally.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.2
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• pp.220-228
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• 2012

In this paper, we explained the design technique about Ka-band active limiter for protecting the receiver of a millimeter wave seeker. To implement low flat leakage power, we proposed the control circuit of active limiter to control limiter voltage with PRF(Pulse Repetition Frequency) signal and input power. This active limiter consisted of the conventional 2 stage passive limiter, a feedback circuit with a directional coupler, detector, non-inverting amplifier and over-current protection resistance. As the test result of the fabricated Ka-band limiter, it had 1 GHz bandwidth, 3.5 dB insertion loss at the small input power and -7.5 dBm flat leakage at the 4 W RF input power, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.9
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• pp.244-250
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• 2012

This paper describes a 4-Gb/s receiver circuit for a low-swing ground-referenced differential signaling system. The receiver employs a common-gate level-shifter and a continuous linear equalizer which compensates inter-symbol-interference (ISI) and improves voltage and timing margins. A bias circuit maintains the bias current of the level-shifter when the common level of the input signal changes. The receiver is implemented with a low-power 65-nm CMOS technology. When 4-Gb/s 400mVp-p signals are transmitted to the receiver through the channel with the attenuation of -19.7dB, the timing margin based on bit error rate (BER) of $10^{-11}$ is 0.48UI and the power consumption is as low as 0.30mW/Gb/s.

• The Journal of the Korea Contents Association
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• v.6 no.3
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• pp.38-45
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• 2006

A dual-level low voltage differential signalling (DLVDS) circuit is proposed aiming at reducing transmission lines for a LCD driver IC. We apply two data to the proposed DLVDS circuit as inputs. Then, the transmitter converts two inputs to two kinds of fully differential signals. In this circuit, two transmission lines are sufficient to transfer two inputs while keeping the LVDS feature. However, the circuit has a common mode bias fluctuation due to difference of the input bias and the reference bias. We compensate the common mode bias fluctuation using a feedback circuit of the current source bias. The receiver recovers the original input data through a level decoding circuit. We fabricated the proposed circuit using $0.25{\mu}m$ CMOS technology. The simulation results of proposed circuit shows 1-Gbps/2-line data rate and 35mW power consumption at 2.5V supply voltage, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.7 s.361
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• pp.7-11
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• 2007

This paper presents a multiband octa-phase LC VCO for SDR receiver. Four identical LC VCOs are connected by using series coupling transistor to obtain the octa-phase signal and low phase noise characteristic. For a multiband application, a band tuning circuit that consists of a switch capacitor circuit and two MOS varactors is proposed. As the MOS switch is on/off state, the frequency range will be varied. In addition, two varactors make the VCO be immune to process variation of the oscillation frequency. The VCO is designed in 0.18-um CMOS technology, consumes 12mA current from 1.8V supply voltage and operates with a frequency band from 885MHz to 1.342GHz (41% tuning range). As driving sub-harmonic mixer, the proposed VCO covers 3 standards(CDMA 2000 1x, WCDMA, WiBro). The measured phase noise is -105dBc@100kHz, -115dBc@1MHz, -130dBc@10MHz for CDMA 2000 1x, WCDMA, WiBro respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.415-422
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• 2004

DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz down-conversion mixer for DSRC communication system was designed and fabricated using 0.8 ${\mu}{\textrm}{m}$ SiGe HBT process technology and RF/LO matching circuits, RF/LO input balun circuits, and If output balun circuit were all integrated on chip. The chip size of fabricated mixer was 1.9 mm${\times}$1.3 mm and the measured performance was 7.5 ㏈ conversion gain, －2.5 ㏈m input IP3, 46 ㏈ LO to RF isolation, 56 ㏈ LO to IF isolation, current consumption of 21 mA for 3.0 V supply voltage.

• Journal of Digital Contents Society
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• v.18 no.5
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• pp.895-904
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• 2017

In this paper, we propose an IoT based smart outlet system for one-person household with electric safety, electric energy consumption management and transmission of messages to the reserved contacts by connecting the emergency network. The proposed smart outlet system is implemented by parsing packet data and protocol between server, module, application and WiFi AP receiver. The WiFi AP built for communication can be used not only for the outlet but also for the gas barrier, the door lock and the like. In addition, the proposed method can provide the remote monitoring function by receiving the amount of power of the receptacle received through the AC current sensor (SCT-013) in real time. The smart outlet system is expected to be capable of automatically shutting off the power in case of emergency through automatic power use analysis in addition to the standby power cutoff function.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.3A
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• pp.189-197
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• 2011

OFDM systems are much studied for the recent high speed wireless optical communication system. OFDM system has basically high PAPR and ICI easily generated because of non-linearity and RF impairments. In the wireless optical communication system, optical output power driven by current of LED is not linear so that transmission signals are distorted. Therefore, research about reception performance of this nonlinear optical output emitted by non-linear LED transfer function and OFDM signal has been conducted. Nonlinear effect of LED is different from nonlinear effect of OFDM system in the conventional radio communication system, which degrades the BER performance. In this paper, we apply non-linear transfer function of recently studied LED into OFDM system. So, for reducing the PAPR and suppressing the ICI in frequency domain of receiver, we suggest a new PAPR reduction technique to reduce non-linear distortion of LED and an adaptive ICI suppression algorithm so that BER performance may be improved. Also, the proposed method is verified through simulation results.

• 전자공학회논문지 IE
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• v.45 no.1
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• pp.31-37
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• 2008

A Wibro RF down converter of 2.3GHz band is designed and implemented in this paper. The problems that can occur in the receiver LNA(Low Noise Amplifier) to minimize additional purposes. In addition, 2.3GHz band from the 75 MHz downward to minimize the losses in the process, transform and improve efficiency, and achieve stable characteristics can be used to make high frequency characteristics of the device. Wibro repeater uses a TDMA(Time Division Multiplexing Access) method is needed because the RF switch. Production criterion specification, the input voltage from +8 V 1.2A of current consumption, 60dB gain and the noise figure of less than 2.5dB, VSWR(Voltage Standing Wave Ratio) less than 1.5, more than IMD(Inter Modulation Distortion) 60dB satisfied. Environmental conditions ($-20^{\circ}C$ to $70^{\circ}C$) to pass the test of reliability in a long time, that seemed crafted Wibro down converter be applied to the Wibro repeater.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.75-82
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• 2010

This paper presents a wideband ${\Delta}{\Sigma}$ fractional-N frequency synthesizer for a multi-band single chip CMOS RFIC transceivers. A wideband VCO utilizes a 6-bit switched capacitor array bank for 2340~3940 MHz frequency range. VCO frequency calibration circuit is designed for optimal capacitor bank code selection before phase locking process. It finishes the calibration process in $2{\mu}s$ over the whole frequency band. The LO generation block has selectable multiple division ratios of ${\div}2$, ${\div}16$, and ${\div}32$ to generate LO I/Q signals for T-DMB/DAB/FM Radio systems in L-Band (1173~1973 MHz), VHF-III (147~246 MHz), VFH-II (74~123 MHz), respectively. The measured integrated phase noise is quite low as it is lower than 0.8 degree RMS over the whole frequency band. Total locking time of the ${\Delta}{\Sigma}$ frequency synthesizer including VCO frequency calibration time is less than $50{\mu}s$. The wideband ${\Delta}{\Sigma}$ fractional-N frequency synthesizer is fabricated in $0.13{\mu}m$ CMOS technology, and it consumes 15.8 mA from 1.2 V DC supply.