• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2012.10a
• /
• pp.765-768
• /
• 2012

Recently, the supply ratio of smart devices application has become increasable, utilization of device increases constantly. At the same time, used application is more gentrified. However, using time of devices is decreased. To solve these problems, many research is studying about the hardware/software. One of them is profiling power consumption by process units. The process can be managed, based on measured energy consumption data. These means that it can efficiently use the residual energy. Application at the stage of program design can analyze and used-energy using the trace by considering the low-power can design. In this paper, we studied software-based power-metering framework for android platform. We survey each process-level power consumption measurement techniques, compare advantages and disadvantages of the technique and propose improved measures.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.41 no.9
• /
• pp.85-95
• /
• 2004

As the design complexity increases, it is a major problem that the size of test pattern is large and power consumption is high in scan, especially system-on-a-chip(SoC), with the automatic test equipment(ATE). Because static compaction of test patterns heads to higher power for testing, it is very hard to reduce the test pattern volume for low power testing. This paper proposes an efficient compression/decompression algorithm based on run-length coding for reducing the amount of test data for low power testing that must be stored on a tester and be transferred to SoC. The experimental results show that the new algorithm is very efficient by reducing the memory space for test patterns and the hardware overhead for the decoder.

• Korean Journal of Optics and Photonics
• /
• v.14 no.1
• /
• pp.33-37
• /
• 2003

A low-power $1{\times}2$ polymeric thermo-optic switch with a trench structure is proposed and fabricated. The trench structure in the optimized region slows down the heat flow from the electrodes, which contributes to the reduction of power consumption. The temperature distribution in the polymer layers has been adjusted to increase the temperature gradient between the two arms of the Y-branch. For comparison, a $1{\times}2$ polymeric thermo-optic switch with no trench structure is fabricated together on the same substrate. In the device with a trench structure, the measured crosstalk is less than -17.0 dB for TE polarization.-15.0 dB for TM polarization. The power consumption is about 66 mW, which is 25% less than that of the device with no trench structure.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.17 no.2
• /
• pp.1-6
• /
• 2017

Due to the recent advances in IoT technologies, reducing power consumption in battery-based IoT devices becomes an important issue. An IoT device is a kind of real-time systems, and processor voltage scaling is known to be effective in reducing power consumption. However, recent research has shown that power consumption in memory increases dramatically in such systems. This paper aims at combining processor voltage scaling and low-power NVRAM technologies to reduce power consumption further. Our main idea is that if a task is schedulable in a lower voltage mode of a processor, we can expect that the task will still be schedulable even on slow NVRAM memory. We incorporate the NVRAM memory allocation problem into processor voltage scaling, and evaluate the effectiveness of the combined approach.

• Proceedings of the Korean Information Science Society Conference
• /
• 2004.10a
• /
• pp.577-579
• /
• 2004

전원을 전적으로 배터리에 의존하는 모바일 임베디드 시스템은 배터리 용량의 한계 때문에 효율적인 에너지의 사용이 매우 중요하다. 특히 memory subsystem은 전체 system에서 소모되는 에너지에서 큰 비중을 차지한다. 이 논문은 성능 면에서 cache의 대안이 되고, cache보다 간단한 구조 때문에 전력소모가 훨씬 적은 on-chip scratch-pad memory(SPM)를 효율적으로 이용할 수 있는 소스 코드 변환 방법 및 SPM 관리방법을 제안한다. 각 함수 단위로 코드 변환을 하며, 어떤 변수를 SPM에 할당하기 위한 소스코드 변환을 했을 때, 소스코드 분석만으로 알 수 있는 변수의 정적인 참조 횟수를 가중치로 고려하여, 코드 변환 후 메모리 참조에 의한 실행 시간과 에너지 소모를 계산하고 이를 바탕으로 SPM에 할당한 변수를 결정한 다음 실제 그 코드 변환을 적용한다. 제안된 코드 변환은 컴파일러에 의해 자동화 될 수 있다. 10개의 임베디드 벤치마크 프로그램을 이용하여 본 논문에서 제안하는 방법의 성능 평가를 한 결과, 실행 시간은 평균 23% 향상되고 에너지 소모는 평균 49% 감소함을 알 수 있다.

• Proceedings of the KSR Conference
• /
• 2011.10a
• /
• pp.3117-3123
• /
• 2011

An Electric railway system has the characteristics. The train powered by substations generates regenerative power when it runs on railway of various slope. A regenerative braking is an ideal system on account of reducing mechanical braking as well as recycling the energy. In this study, Seoul Metropolitan Rapid Transit (substation) Precision analysis of the power of the electric car was carried out. Through this use of power substations, power supplies and trains through the regenerative power of the data analysis was performed utilizing research-based work.

• Electronics and Telecommunications Trends
• /
• v.18 no.2 s.80
• /
• pp.37-44
• /
• 2003

무선통신의 효용성이 증가되면서 다양한 분야에서 유선과 무선을 통합한 형태의 연결망이 구축되고 있으며, 이에 따라 저속, 저가, 저전력의 무선통신 분야의 기술 규격에 대한 요구사항이 제기되고 있다. 본 고에서는 무선으로 저속의 데이터 전송률을 요구하는 다양한 응용분야에 널리 활용될 수 있는 IEEE 802.15.4 저속 무선 PAN의 표준안과 응용서비스에 대해 살펴본다. 저속 무선 PAN 표준안의 주요 특징은 네트워크 구성의 유연성, 저가, 저전력 소모에 있다.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2011.04a
• /
• pp.123-126
• /
• 2011

저전력 운전을 위해 정렬 알고리즘을 대상으로 알고리즘 복잡도와 에너지 소모 관련성을 분석하고 전력 효율을 향상시키도록 알고리즘을 수정 개발하여 실험하였다. 얻어진 결과는 향후 그린컴퓨팅 실현에 활용하고자 한다.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.19 no.2
• /
• pp.11-21
• /
• 2009

The NTRU cryptosystem proposed by Hoffstein et al. in 1990s is a public key cryptosystem based on hard lattice problems. NTRU has many advantages compared to other public key cryptosystems such as RSA and elliptic curve cryptosystems. For example, it guarantees high speed encryption and decryption with the same level of security, and there is no known quantum computing algorithm for speeding up attacks against NTRD. In this paper, we analyze the security of NTRU against the simple power analysis (SPA) attack and the statistical power analysis (STPA) attack such as the correlation power analysis (CPA) attack First, we implement NTRU operations using NesC on a Telos mote, and we show how to apply CPA to recover a private key from collected power traces. We also suggest countermeasures against these attacks. In order to prevent SPA, we propose to use a nonzero value to initialize the array which will store the result of a convolution operation. On the other hand, in order to prevent STPA, we propose two techniques to randomize power traces related to the same input. The first one is random ordering of the computation sequences in a convolution operation and the other is data randomization in convolution operation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.39C no.8
• /
• pp.722-730
• /
• 2014

Due to the advance of hardware, various devices have mobility features, and many applications need the data transmission. In addition, it is essential for latest smartphones to utilize multi-cores and multi-threads because of the enhancement of Application Processor. Therefore, this paper analyzes the performance/power consumption according to transmission rate, the number of cores, and that of threads in the system that is supposed to conduct data transmission and processing simultaneously. Through the analysis, this paper provides a direction for the proper number of threads in terms of performance improvement and efficient power consumption.