• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.4
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• pp.1121-1133
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• 1998

In this paper, a new method is proposed for a simple andaccurate design of larage-sigal power amplifier using the output current- and volage- waveform analysis. An existing high-efficiency theory, Harmonic Loading, is modified to apply to a real device, and the notion of "actual bias point at large-signal input" is proposed. Based on the proposed theory, 2GHz band poweramplifier is implemented using HEMT device, and the implemented amplifier shows 14dBm output power, 46% drain efficienty, 38% power-added efficiency and 7.8dB gain at 2V bias voltage.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.4
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• pp.23-30
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• 2003

본 고에서는 마이크로파 대역에서 우수한 전력특성을 보이는 GaAs HBT를 이용한 광대역 고출력 전력증폭기 설계에 대하여 살펴본다. GaAs HBT의 전력 소자로서의 장점과 설계시 고려해야 할 단위 전력 소자의 설계, 열적 안정성 문제, 바이어스 회로설계, 그리고 광대역 설계 기법에 대하여 간단히 소개한다. 그리고, 본 연구에서 2~6 GHz 광대역 고출력 전력증폭기를 캐스코드(cascode) HBT를 이용하여 설계하였다. 측정 결과, 2 W의 평균 출력 전력, 10 dB의 이득, 24~43 %의 전력 부가 효율을 얻을 수 있었으며, 칩 크기는 $1.6{\times}2.4 mm^2$로서 매우 작았다. 이 결과를 기존에 개발된 GaAs HBT 광대역 고출력 전력증폭기와 비교 분석하였으며, 칩 면적당 대역폭과 출력 전력, 효율이 아주 우수함을 알 수 있다.

• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.430-431
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• 2010

본 논문에서는 가시광 통신을 위한 고효율 대용량 LED 드라이버를 제안한다. 기존 가시광 통신을 위한 LED 드라이버는 LED의 선형 구동방식으로 인한 전력 손실 및 발열이 매우 심각하여 대용량의 조명용 LED에 적용하기에는 현실적인 어려움이 뒤따랐다. 하지만 제안 회로는 LED의 스위칭 방식 구동을 통해 전력 변환 효율 및 발열이 크게 개선되어 대용량의 조명용 LED에 적용할 수 있을 뿐 아니라 효율 저하 없이 최대 10Mbps의 높은 데이터 전송 성능을 가지는 부가적인 무선통신 시스템을 구현할 수 있다. 최종적으로, 제안회로의 우수성을 검증하기 위하여 무선통신 오디오 시스템을 구현하여 고찰된 실험 결과를 제시한다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.6
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• pp.593-596
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• 2015

In this paper, we design a high efficiency class E power amplifier operating at low drain bias voltage for wireless power transfers. A 13.56 MHz power amplifier is designed at drain bias voltage of 12.5 V using Si MOSFET with the breakdown voltage of 40 V. High quality-factor solenoidal inductor is designed and fabricated for use in output matching circuit to improve output power and efficiency. Input matching circuit simply consists of resistor and inductor to reduce the circuit area and improve the stability. The fabricated power amplifier shows the measured output power of 38.6 dBm with the gain of 16.6 dB and power added efficiency of 89.3 % at 13.56 MHz.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.1
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• pp.231-238
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• 2019

In this paper, we have studied how to improve the amplifiers efficiency by minimizing the combining loss when several unit power amplifiers are combined to obtain high output power. Specifically, we have developed Ka-band Spatial Combining Amplifier. The fabricated Spatial Combining Amplifier is a Ka-band 20W class SSPA, which uses a 5W class unit amplifier module 8EA designed using a GaN bare die. We also combined The unit amplifier module using 8-way spatial divider and combiner with a hybrid radial structure. The output combining loss of the fabricated spatial coupler is about 0.334dB, which is about 92.6% efficiency. In this paper, we developed a Spatial Combining Amplifier with a maximum saturation output of 10W and a power addition efficiency of over 15%. As a result, we achieved the maximum saturation output of 30W and the power addition efficiency of 19%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.902-911
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• 2003

Using InGaP/GaAs HBT power cells with a 2.0${\times}$20$\mu\textrm{m}$$^2$ emitter area of a unit HBT, a two stage MMIC power amplifier has been developed for IMT-2000 handsets. An active-bias circuit has been used for temperature compensation and reduction in the idling current. Fitting on measured S-parameters of the HBT cells, circuit elements of HBT's nonlinear equivalent model have been extracted. The matching circuits have been designed basically with the extracted model. A two stage HBT MMIC power amplifier fabricated using ETRI's HBT process. The power amplifier produces an 1-㏈ compressed output power(P$\_$l-㏈/) of 28.4 ㏈m with 31% power added efficiency(PAE) and 23-㏈ power gain at 1.95 GHz in on-wafer measurement. Also, the power amplifier produces a 26 ㏈m output power, 28% PAE and a 22.3-㏈ power gain with a -40 ㏈c ACPR at a 3.84 ㎒ off-center frequency in COB measurement.quency in COB measurement.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.368-369
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• 2011

연료전지와 같은 저전압 대전류의 출력 특성을 가지는 에너지원의 계통연계를 위해서는 이를 승압하는 컨버터와 승압된 전압을 교류로 변환하는 인버터부가 요구된다. 인버터의 동작을 위해서는 높은 승압비를 가지는 컨버터가 필요하며 전체시스템의 고효율화를 위해서는 고효율 DC/DC컨버터가 필요하다. 본 논문에서는 공진형으로 동작되는 다수대의 공진형 컨버터를 PISO방식으로 구성하여 고효율화를 꾀했으며, 이를 계통연계형 인버터와 연결한 실제품을 구성하였으며, 기존의 방식인 하드스위칭 타입 컨버터를 이용한 전력변환장치와의 비교를 통하여 본 시스템의 타당성을 입증하고자 한다.

• Journal of Advanced Navigation Technology
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• v.13 no.3
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• pp.358-364
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• 2009

This paper shows some variable bias techniques which can improve the power added efficiency(PAE) for the designed power amplifier. Some simulations have been done to get the effect of the bias change, and variable bias is adopted to get the higher efficiency for dual mode amplifier which generates two different output power levels. With drain bias change and a fixed gate bias, the amplifier shows PAE improvement compared to the fixed bias amplifier. In addition, this paper analyzed nonlinear distortion of the power amplifier and has used the digital predistortion which can result in 10dB ACPR improvement for the dual band amplifier.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.2
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• pp.295-300
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• 2005

In this paper we have designed a two-stage Class I power amplifier operated at 2.4CHz for Class-1 Bluetooth application. The power amplifier employs class-I topology to exploit its soft-switching property for high efficiency. The latch-structured pre-amplifier with amplifiers makes its output signal as sharp as possible for soft switching of the next power amplifier. It improves the overall efficiency of the proposed power amplifier. It shows 65.8$\%$ PAE, 20dB power gain and 20dBm output power.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.12
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• pp.1-6
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• 2008

In this paper, bias control circuit structure have been employed to improve the power added efficiency of the CMOS class-E power amplifier on low input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal. The proposed CMOS class-E power amplifier using bias controlled circuit has been improved the PAE on low output power level. The operating frequency is 2.14GHz and the output power is 22dBm to 25dBm. In addition to, it has been evident that the designed the structure has showed more than a 80% increase in PAE for flatness over all input power level, respectively.