• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.12
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• pp.2741-2746
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• 2012

In this study, we propose a novel structure based on AlGaN substrate or buffer layer to implement a normally-off mode transistor that was difficult to be realized by conventional AlGaN/GaN heterojunction structures. The channel under the gate can be selectively depleted by growing an upper AlGaN barrier with a higher Al mole fraction and a top GaN charge elimination layer on AlGaN substrate or buffer layer. The proposed AlGaN heterojunction field effect transistor can achieve a threshold voltage of > 2 V, which is generally required in power device specification.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.1 s.34
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• pp.59-63
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• 2005

A simulation method combined with the simulation program with integrated circuit emphasis (SPICE) and the technology computer-aided design (TCAD) has been proposed to estimate the electrical characteristics of the metal-ferroelectric-semiconductor field effect transistor (MFS/MFISFET). The complex behavior of the ferroelectric property was analyzed and surface potential of the channel region in the MFS gate structure was calculated with the numerical TCAD method. Since the calculated surface potential is equivalent with the surface potential obtained with the SPICE model of the conventional MOSFET, we can obtain the current-voltage characteristics of MFS/MFISFET corresponding to the applied gate bias. Therefore, the proposed method will be very useful for the design of the integrated circuits with MFS/MFISFET memory cell devices.

• Journal of IKEEE
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• v.22 no.2
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• pp.499-505
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• 2018

Since feedback field-effect transistors (FBFETs) have ideal switching characteristics resulting from feedback phenomenon caused by electrons and holes in the channel region, the researches about FBFET devices have been proposed and demonstrated worldwide recently. The device operated with novel principle can operate as a switching electronic device. Besides, because the hysteresis characteristics of the device by accumulated electrons and holes in channel region can be also utilized for memory applications, its application range is wide. In this paper, we cover various device structures of FBFET proposed until now and their operation mechanism, and then look into their applicable fields.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.115-117
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• 2022

The electrical characteristics of the monolithic 3-dimensional static random access memory consisting of a feedback field-effect transistor (M3D-SRAM-FBFET) was investigated using technology computer-aided design (TCAD). The N-type FBFET and N-type MOSFET are designed with fully depleted silicon on insulator (FDSOI), and those are located at bottom and top tiers, respectively. For the M3D-SRAM-FBFET, as the supply voltage decreased from 1.9 V to 1.6 V, the reading on-current decreased approximately 10 times.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2021.10a
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• pp.634-636
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• 2021

In this study, we studied the macro-modeling of an feedback field-effect transistor (FBFET) using SPICE simulation. The previously presented macro-model of the FBFET is consisting of two circuits. one is charge integration circuit, and the other is current generation circuit. The previous current generation circuit has problem that can't predict performance accurately of the circuits, due to implementing only I_DS-V_GS characteristics. To solve this problem, we presents a model that can implement not only I_DS-V_GS characteristics but alos I_DS-V_DS characteristics by adding the diode in the current generation circuit.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.333.2-333.2
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• 2014

RF 스퍼터링 방법을 이용하여 제작된 IGZO 박막 트랜지스터 및 단막을 제조하여 UV처리 유무에 따른 전기적 특성을 평가하였다. IGZO 박막 트랜지스터는 Bottom gate 구조로 제조되었으며 UV처리 이후 전계효과 이동도, 문턱전압 이하 기울기 값등 모든 전기적 특성이 개선된 것을 확인 하였다. 이후 UV처리에 따른 소자의 전기적 특성 개선에 대한 원인을 분석하기위해 물리적, 전기적, 광학적 분석을 실시하였다. XRD분석을 통해 UV처리 유무에 따른 IGZO박막의 물리적 구조 변화를 관찰했지만 IGZO박막은 UV처리 유무에 상관없이 물리적 구조를 갖지 않는 비정질 상태를 보였다. IGZO 박막 트랜지스터의 문턱전압 이하의 기울기 값과을 통하여 반도체 내부에 존재하는 결함의 양을 계산한 결과 UV를 조사하였을 때 결함의 양이 감소하는 결과를 얻었으며 이 결과는 SE를 통해 밴드갭 이하 결함부분을 측정하였을 때와 같은 결과였다. 또한 UV처리 전에는 shallow level defect, deep level defect등의 넓은 준위에서 결함이 발견된 반면 UV처리 이후에는 deep level defect준위는 없어지고 shallow level defect준위 역시 급격하게 감소한 것을 볼 수 있었다. 결과적으로 IGZO 박막의 경우 UV처리를 함에 따라 결함의 양이 감소하여 IGZO박막 트랜지스터의 전계 효과 이동도를 증가 시킬 뿐 아니라 문턱전압 이하 기울기 값을 감소시키는 원인으로 작용하게 된다는 결과를 도출하였다.

• Electrical & Electronic Materials
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• v.17 no.7
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• pp.21-29
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• 2004

절연성 기판 위에 단결정이 아닌 반도체 박막을 이용하여 만든 전계효과 (Field Effect FET) 소자로 일반적으로 정의되는 박막 트랜지스터 (Thin Film Transistor, TFT)는 1962 RCA lab.의 Weimer에 제안되어 지금까지 많은 발전을 거듭해 왔다. ［1］ TFT는 SRAM이나 ROM에도 응용되지만, 주된 사용 분야는 능동구동방식 평판 디스플레이(Active Matrix Flat Panel Display)의 화소 스위칭 소자이다. 액정 디스플레이(Liquid Crystal Display, LCD)나 유기 전계발광 디스플레이(Organic Electro-luminescence Display, OELD) 화소의 스위칭 소자로도 TFT가 널리 사용되고 있다. (중략)

• Journal of Sensor Science and Technology
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• v.8 no.6
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• pp.434-439
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• 1999

Differential field effect transistors with double gate metal for integrated humidity sensors have been fabricated and the drain current drift characteristics to relative humidity have been investigated. The aspect ratio was 250/50 for both transistors to get the current difference between the sensing device and non-sensing one. The normalized drain current of the fabricated humidity sensitive field effect transistors increases from 0.12 to 0.3, as relative humidity increases from 30% to 90%.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.166-168
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• 2016

This paper introduces about the structure guide lines of pocket tunneling Field effect transistor. As the pocket length or thickness increase, on-current $I_{on}$ increases. As the pocket thickness is less than 3nm, subthreshold swing (SS) increase. As the dielectric constants of the gate insulator increases, the performance of on-current and subthreshold swing enhances.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.475-476
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• 2019

L-shaped tunneling field-effect-transistor (LTFET) is considered a superior device over conventional TFETs. However, experimentally demonstrated LTFET demonstrated poor subthreshold characteristics which was attributed to trap-assisted-tunneling (TAT) caused by presence of trap states. In this paper, TAT mechanism in the experimentally demonstrated LTFET is investigated with the help of band diagram and TAT recombination rate (GTAT).