• Journal of the Microelectronics and Packaging Society
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• v.12 no.1 s.34
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• pp.59-63
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• 2005

A simulation method combined with the simulation program with integrated circuit emphasis (SPICE) and the technology computer-aided design (TCAD) has been proposed to estimate the electrical characteristics of the metal-ferroelectric-semiconductor field effect transistor (MFS/MFISFET). The complex behavior of the ferroelectric property was analyzed and surface potential of the channel region in the MFS gate structure was calculated with the numerical TCAD method. Since the calculated surface potential is equivalent with the surface potential obtained with the SPICE model of the conventional MOSFET, we can obtain the current-voltage characteristics of MFS/MFISFET corresponding to the applied gate bias. Therefore, the proposed method will be very useful for the design of the integrated circuits with MFS/MFISFET memory cell devices.

• Journal of IKEEE
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• v.22 no.2
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• pp.499-505
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• 2018

Since feedback field-effect transistors (FBFETs) have ideal switching characteristics resulting from feedback phenomenon caused by electrons and holes in the channel region, the researches about FBFET devices have been proposed and demonstrated worldwide recently. The device operated with novel principle can operate as a switching electronic device. Besides, because the hysteresis characteristics of the device by accumulated electrons and holes in channel region can be also utilized for memory applications, its application range is wide. In this paper, we cover various device structures of FBFET proposed until now and their operation mechanism, and then look into their applicable fields.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.2
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• pp.117-122
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• 2016

Recently, the detection of pH with real-time and in vivo has been focal pointed in the environmental or medical fields. In this work, we developed the pH sensor using graphene sheet. Graphene has high biocompatibility. We fabricated flexible solution-gated field-effect transistors (SGFETs) on graphene sheet transferred on the polyethylene terephthalate (PET) substrate to detect pH in electrolyte solution. The gate length was $500{\mu}m$ and the gate width was 8 mm. We evaluated the current-voltage (I-V) transfer characteristics of graphene SGFETs in pH solution. The drain-source current ($I_{DS}$) and the gate-source voltage ($V_{GS}$) curves of graphene SGFETs were depended on pH value. The Dirac point of graphene SGFETs linearly shifted to the positive direction about 19.32 mV/pH depending on the pH value in electrolyte solution.

• Journal of Sensor Science and Technology
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• v.8 no.6
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• pp.434-439
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• 1999

Differential field effect transistors with double gate metal for integrated humidity sensors have been fabricated and the drain current drift characteristics to relative humidity have been investigated. The aspect ratio was 250/50 for both transistors to get the current difference between the sensing device and non-sensing one. The normalized drain current of the fabricated humidity sensitive field effect transistors increases from 0.12 to 0.3, as relative humidity increases from 30% to 90%.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.166-168
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• 2016

This paper introduces about the structure guide lines of pocket tunneling Field effect transistor. As the pocket length or thickness increase, on-current $I_{on}$ increases. As the pocket thickness is less than 3nm, subthreshold swing (SS) increase. As the dielectric constants of the gate insulator increases, the performance of on-current and subthreshold swing enhances.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.44-47
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• 2000

본 연구는 α-Si:H TFT(Amorphous Silicon Thin Film Transistor)를 대체 할 펜타센을 활성층으로 사용하는 박막 트랜지스터를 제작에 관한 것이다. 유기 박막 트랜지스터는 유기발광소자와 함께 유연한 디스플레이에 응용된다. 펜타센 박막 트랜지스터의 제작은 채널 길이 25㎛, 70㎛, 소스, 드레인, 게이트 전극으로 Au을 lift off 공정으로 제작하였으며, 펜타센은 OMBD(Organic Molecular Beam Deposition)로 기판온도를 80℃로 유지하여 증착하였다. 제작된 소자로부터 트랜지스터 전류-전압 특성곡선을 측정하였고, 게이트에 의한 채널의 전도도가 조절됨을 확인하였다. 그리고, 전달특성곡선으로부터 문턱전압과 전계효과 이동도를 추출하였다.

• Journal of IKEEE
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• v.22 no.2
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• pp.488-490
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• 2018

In this study, we propose newly designed feedback field-effect transistors that utilize the positive feedback of charge carriers in single-gated silicon channels to achieve steep switching behaviors. The band diagram, I-V characterisitcs, subthreshold swing, and on/off current ratio are analyzed using a commercial device simulator. To demonstrate the changing characteristics of hysteresis, one of the important features of the feedback field effect transistor, we simulated changing the gate insulating material and the gate metal electrode. The fluctuation in the characteristics changed the $V_{TH}$ of the hysteresis and showed a decrease in width of the hysteresis.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.333.2-333.2
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• 2014

RF 스퍼터링 방법을 이용하여 제작된 IGZO 박막 트랜지스터 및 단막을 제조하여 UV처리 유무에 따른 전기적 특성을 평가하였다. IGZO 박막 트랜지스터는 Bottom gate 구조로 제조되었으며 UV처리 이후 전계효과 이동도, 문턱전압 이하 기울기 값등 모든 전기적 특성이 개선된 것을 확인 하였다. 이후 UV처리에 따른 소자의 전기적 특성 개선에 대한 원인을 분석하기위해 물리적, 전기적, 광학적 분석을 실시하였다. XRD분석을 통해 UV처리 유무에 따른 IGZO박막의 물리적 구조 변화를 관찰했지만 IGZO박막은 UV처리 유무에 상관없이 물리적 구조를 갖지 않는 비정질 상태를 보였다. IGZO 박막 트랜지스터의 문턱전압 이하의 기울기 값과을 통하여 반도체 내부에 존재하는 결함의 양을 계산한 결과 UV를 조사하였을 때 결함의 양이 감소하는 결과를 얻었으며 이 결과는 SE를 통해 밴드갭 이하 결함부분을 측정하였을 때와 같은 결과였다. 또한 UV처리 전에는 shallow level defect, deep level defect등의 넓은 준위에서 결함이 발견된 반면 UV처리 이후에는 deep level defect준위는 없어지고 shallow level defect준위 역시 급격하게 감소한 것을 볼 수 있었다. 결과적으로 IGZO 박막의 경우 UV처리를 함에 따라 결함의 양이 감소하여 IGZO박막 트랜지스터의 전계 효과 이동도를 증가 시킬 뿐 아니라 문턱전압 이하 기울기 값을 감소시키는 원인으로 작용하게 된다는 결과를 도출하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.450-452
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• 2016

The effect of channel doping on L-shaped Tunneling Field-Effect Transistors (TFETs) have been investigated by 2D TCAD simulation. When the source doping is over $10^{20}cm^{-3}$, the subthreshold swing (SS) is abruptly decreased, and when drain doping concentration is below $10^{18}cm^{-3}$, the leakage current in the negative voltage is reduced.

• Journal of Convergence for Information Technology
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• v.11 no.7
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• pp.104-110
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• 2021

A novel selective oxidation process has been developed for low source/drain (S/D) series resistance of the fin channel metal oxide semiconductor field effect transistor (MOSFET). Using this technique, the selective oxidation fin-channel MOSFET (SoxFET) has the gate-all-around structure and gradually enhanced S/D extension regions. The SoxFET demonstrated over 70% reduction in S/D series resistance compared to the control device. Moreover, it was found that the SoxFET behaved better in performance, not only a higher drive current but also higher transconductances with suppressing subthreshold swing and drain induced barrier lowering (DIBL) characteristics, than the control device. The saturation current, threshold voltage, peak linear transconductance, peak saturation transconductance, subthreshold swing, and DIBL for the fabricated SoxFET are 305 ㎂/㎛, 0.33 V, 13.5 𝜇S, 76.4 𝜇S, 78 mV/dec, and 62 mV/V, respectively.