• Journal of KIISE:Computer Systems and Theory
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• v.34 no.2
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• pp.57-64
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• 2007

This paper proposed the low power texture cache for mobile 3D graphics accelerators. It is very important to reduce the leakage power in the standby mode for mobile 3D graphics accelerators and the memory access latency of texture mapping in the active mode which needs a large memory bandwidth. The proposed structure reduces the leakage power using variable threshold values of power mode transitions according to the selected texture filtering algorithms of application programs, which has the run time gain for texture mapping. In the trace driven cache simulation the proposed structure shows the best 7% performance gain to the previous MSA cache according to the new performance metric considering both normalized leakage power and run time impact.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.2
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• pp.466-474
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• 2014

According to wireless network technology and mobile processors performance were improved, the small wireless mobile device such as smart phones has been widely utilized. The mobile devices can be used GPS information, thereby the services based on location information was increased. GPS was impossible to provide location information in indoor and signal shading environment, and the tracking systems based on short distance wireless communication are required infrastructure. The IEEE 802.11 based tracking system is possible estimation using APs, however the tracking device is exhausted battery power seriously. In this paper, we propose IEEE 802.11 based low-power tracking system. We reduced power consumption from channel scanning and network connection. For performance evaluation, we designed and implemented the tracking tag device, and measured power consumption of the device. As the simulation result, we confirmed that the power consumption was reduced 46% compare to the standard execution.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.04a
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• pp.477-480
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• 2007

저전력 OFDM(orthogonal frequency division multiplexing) 시스템용 FFT(Fast-Fourier-Transform) LSI를 저전력 동작을 시키기 위해서 FFT LSI는 current-mode 회로로 구현되었다. Current-mode FFT LSI에서, VIC(Voltage-to-current converter)는 입력 전압 신호를 전류로 바꾸는 first main device이다. 저전력 OFDM을 위해 FFT LSI와 VIC가 한 개의 칩과 결합되는 것을 고려하면, VIC는 전력 손실은 낮고, VIC와 FFT LSI 사이에서의 DC offset 전류는 최소인 작은 크기의 chip으로 설계되어야 한다. 본 논문에서는 새로운 VIC를 제안한다. 선형 동작구간을 넓히고 DC offset 전류를 대폭 감소하는 방법을 제시하였다. VIC는 0.35[um] CMOS process로 구현되었으며, 시뮬레이션 결과에 따르면 제안된 VIC는 current-mode FFT LSI와 0.1[uA] 미만의 매우 작은 DC offset 전류, 1.4[V]의 넓은 선형구간을 갖으며, 저전력으로 동작한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.7B
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• pp.578-585
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• 2012

Location tracking system through GPS and Wi-Fi is available at no additional cost in an environment of IEEE 802.11-based wireless network. It is useful for many applications in outdoor environment. However, a previous systems used for general device to tag. It is unsuitable for power aware location tracking system because general devices is more expensive and non-optimized for tracking. The hand-off method of IEEE 802.11 standard is not enough considering power consumption. This thesis analyzes the previous location tracking systems and proposes power aware system. First, we designed and implemented tag to optimize location tracking. Next, we propose low-power hand-off method and low-power behavior model in implemented tag. The proposed hand-off method resolve power problem by using the location information and behavior model minimize power consumption of tag through power-saving mode and the concept of duty cycle. To evaluating proposed methods and system performance, we perform simulations and experiments in real environment. And then, we calculate tag's power consumption based on the actual measured current consumption of each operation. In a simulation result, the proposed behavior model and hand-off method reduced about 98%, 59% than the standard's hand-off and default behavior model.

• 전자공학회논문지 IE
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• v.47 no.2
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• pp.1-7
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• 2010

This paper presents a low power digital PLL architecture and design for implementation of the PLL-based frequency synthesizers. In the proposed architecture, a wide band digital logic quadricorrelator is used for preliminary frequency detector and a narrow band digital logic quadricorrelator is used for final DCO control. Also, a circuit technique for reducing leakage current is adopted in order to minimize the standby mode power consumption of the deactivated block. The proposed digital PLL is designed and verified by MyCAD with MOSIS 1.8V $0.35{\mu}m$ CMOS technology, and the simulation results show that the power consumption can be lowered by more than 20%.

• Proceedings of the Korean Information Science Society Conference
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• 2003.04a
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• pp.208-210
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• 2003

본 논문은 내장형 시스템에서 저전력 소모를 위한 선택적 페이지 캐쉬 사용 기법을 제안한다. 내장형 시스템의 저장매체로 널리 사용되고 있는 플래쉬 메모리는 데이터를 압축하여 저장하기 때문에 리눅스에서 사용되는 페이지 캐쉬가 효과적으로 동작한다. 하지만 플래쉬 메모리는 RAM 보다 전력 소모가 적기 때문에 페이지 캐쉬 사용에 따른 빈번한 RAM 접근 횟수는 전력 소모량을 증가시킨다. 따라서 저전력 시스템 운영을 위해서 페이지 캐쉬를 선택적으로 사용하는 것을 제안한다. 리눅스 운영체제상에서 구현된 시스템을 바탕으로 수행속도가 향상되고 전력 소모량이 감소함을 보인다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.647-648
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• 2016

본 논문에서는 차량용 레이더를 위한 저 전력 24GHz CMOS 저 잡음 증폭기를 제안한다. 이러한 회로는 1.8볼트 전원에서 동작하며, 저 전력에서도 높은 전압 이득과 낮은 잡음지수를 가지도록 설계되어 있다. 제안한 회로는 TSMC $0.13{\mu}m$ 고주파 CMOS 공정으로 구현되어 있다. 제안한 회로는 최근 발표된 연구결과에 비해 저 전력동작에서 높은 전압이득 및 낮은 잡음지수 특성을 보였다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.7
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• pp.38-44
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• 2008

In this paper, we introduce an low complexity and low power IR-UWB (impulse radio ultra wideband) baseband transceiver for wireless sensor network. The proposed baseband, implemented by TSMC 0.18um CMOS technology, has a simple structure in which a simplified packet structure and a digital synchronizer with 1-bit sampler to detect incoming pulses are used. Besides, clock gating method using gated clock cell as well as customized clock domain division can reduce the total power consumption drastically. As a result, the proposed baseband has about 23K digital gates with an internal memory of 2Kbytes and achieves about 1.8mW@1Mbps power consumption.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.671-674
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• 1998

본 논문에서는 최근 급격히 수요가 증대하고 있는 휴대용 단말기의 수신기 선단에 사용되는 저잡음 증폭기(LNA)를 0.6㎛ CMOS공정 파라미터를 사용하여 설계하였다. 설계된 LNA는 전원 전압 ±1.2v, 900㎒대에서 동작하는 전류 재사용방식의 적층 CMOS구조로서 시뮬레이션 결과 전력소모가 9.45㎽, 전력이득은 23.7dB, 선형지수 OIP3는 7.6dBm을 나타내어 저전력 저잡음 특성을 얻었다. 사용된 인덕터의 Q는 3.5이다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.2B
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• pp.215-224
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• 2010

A container security device (CSD) monitors intrusions through the cargo door; it is a reduced function device that uses IEEE 802.15.4 with a beacon mode. However, in the beacon mode, the CSD consumes too much battery power in periodical idle listening and sensing trials. Moreover, the CSD cannot send the message to the CSD reader actively, and it makes big latency problem. Therefore, we propose a low-power CSD to reduce the unnecessary power consumption. The proposed CSD follows the requirements of the U.S. Department of Homeland Security, and reduces battery consumption through a power-efficient hardware design, a night-watch mechanism for low-power operation and low-power sensing to reduce unnecessary monitoring. And the CSD sends alert message to the CSD reader. Simulation results show that our CSD reduces battery consumption by over 70% through the night-watch mechanism and by approximately 80% through the low-power sensing. And the CSD can send the alert message to the remote CSD reader by over 94%.