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Input System Implementation for Virtual Reality Headset Using Electro-oculogram(EOG) (안전도를 이용한 가상현실 헤드셋의 입력시스템 구현)

  • Nam, Youngju;Kwon, Kichul;Kim, Byeongjun;Lee, Euisin;Kim, Nam
    • The Journal of the Korea Contents Association
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    • v.16 no.9
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    • pp.739-750
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    • 2016
  • The most of virtual reality headset have the separated controllers while they put on the headset; so the users may feel the discomfort and burden for the operation. In this paper, a novel virtual reality headset system using the EOG (electro-oculogram) is proposed and it has a distinguished feature that the user does not need to control the virtual reality headset by the hands, but the displayed contents are controllable by the electrical activity of the user's brain. The proposed system consist of the mobile device, a virtual reality headset, and an EOG headset for data acquisition. The system is implemented by using the Unity3D engine for the signal processing and controller, and the concept is confirmed through the implementation that it is more interesting and easier to control the virtual reality headset.

RBFNN Based Decentralized Adaptive Tracking Control Using PSO for an Uncertain Electrically Driven Robot System with Input Saturation (입력 포화를 가지는 불확실한 전기 구동 로봇 시스템에 대해 PSO를 이용한 RBFNN 기반 분산 적응 추종 제어)

  • Shin, Jin-Ho;Han, Dae-Hyun
    • Journal of the Institute of Convergence Signal Processing
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    • v.19 no.2
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    • pp.77-88
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    • 2018
  • This paper proposes a RBFNN(Radial Basis Function Neural Network) based decentralized adaptive tracking control scheme using PSO(Particle Swarm Optimization) for an uncertain electrically driven robot system with input saturation. Practically, the magnitudes of input voltage and current signals are limited due to the saturation of actuators in robot systems. The proposed controller overcomes this input saturation and does not require any robot link and actuator model parameters. The fitness function used in the presented PSO scheme is expressed as a multi-objective function including the magnitudes of voltages and currents as well as the tracking errors. Using a PSO scheme, the control gains and the number of the RBFs are tuned automatically and thus the performance of the control system is improved. The stability of the total control system is guaranteed by the Lyapunov stability analysis. The validity and robustness of the proposed control scheme are verified through simulation results.

Affine Projection Algorithm for Subband Adaptive Filters with Critical Decimation and Its Simple Implementation (임계 데시메이션을 갖는 부밴드 적응필터를 위한 인접 투사 알고리즘과 간단한 구현)

  • Choi, Hun;Bae, Hyeon-Deok
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.5 s.305
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    • pp.145-156
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    • 2005
  • In application for acoustic echo cancellation and adaptive equalization, input signal is highly correlated and the long length of adaptive filter is needed. Affine projection algorithms, in these applications, can produce a good convergence performance. However, they have a drawback that is a complex hardware implementation. In this paper, we propose a new subband affine projection algorithm with improved convergence and reduced computational complexity. In addition, we suggest a good approach to implement the proposed method. In this method by applying polyphase decomposition, noble identity and critical decimation to the anne projection algorithm the number of input vectors for decorrelation can be reduced. The weight-updating formula of the proposed method is derived as a simple form that compared with the NLMS(normalized least mean square) algorithm by the reduced projection order The efficiency of the proposed algorithm for a colored input signal was evaluated by using computer simulations.

Design and Implementation of 2.4 GHz Beamforming antenna using 4×4 Butler Matrix (4×4 버틀러 매트릭스를 이용한 2.4 GHz 빔포밍 안테나 설계 및 구현)

  • Kim, Young-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.11
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    • pp.1687-1695
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    • 2021
  • In this paper, it is designed and analyzed the beamforming antenna using the butler matrix. The operating frequency of the proposed beamforing antenna is ISM band of 2.4 GHz band and the component of the beamforing antenna consisted of a 1×4 array antenna and a 4×4 butler matrix. Each output port of 4×4 butler matrix outputs the signal having a different phase, it is provided to each input port of 1×4 array antenna. The beamforming antenna with four output ports forms a total of four beams. In order to analyze the radiation pattern of the beamforming antenna, it was provided by switching the signal to the input port and proceeded the Individual analysis for the input port 1 to 4. The main beams of the proposed beamforming antenna were formed in the -12°, 40°, -40° and 12° directions according to each input port, respectively.

Design of High Speed Data Acquisition and Fusion System with STM32 Processor (STM32 프로세서를 이용한 고속 데이터 수집 및 융합 시스템 설계)

  • Lim, Joong-Soo
    • Journal of the Korea Convergence Society
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    • v.7 no.1
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    • pp.9-15
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    • 2016
  • In this paper, we describe the design of a high speed data acquisition system(DAS) with STM32 processor based on Cortex-M4. The system is used for the sensor devices to collect raw data on production lines at factory and send them to the servo computer in real time. The system is designed for multi functions with universal asynchronous receiver and transmitter(UART), analog to digital converter(ADC), digital to analog converter(DAC), and general purpose input output(GPIO). those are well tested for various data acquisition and high speed motor control in real time.

Digital Phase-Locked Loop(DPLL) Technique for UPS (무정전 전원장치용 디지털 위상동기화 기법)

  • 김제홍;최재호
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.11 no.3
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    • pp.106-113
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    • 1997
  • In uninterruptible power supply(UPS), a high speed phase control is usually required to compensate transients in the output voltage at the instant of transfer from the ac line to the inverter when the ac line fails or backs to the ac line in case of the inverter fails. To overcome this problem, this paper pre¬sents the closed digital phase-locked loop(DPLL) techniques designed by full software with TMS320C31 digital signal processor and describes the functional operation of the proposed DPLL. Fi¬nally, the performance of the proposed DPLL is shown and discussed through simulation and experiment.

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155.52 Mbps High Performance CMOS Receiver for STM-1 Application (STM-1급 155.52 Mbps 고성능 CMOS 리시버의 구현)

  • 채상훈;정희범
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.6B
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    • pp.1074-1079
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    • 1999
  • A high performance CMOS receiver for 155.52 Mbps STM-1 digital communication has been designed and fabricated. The ASIC operates properly with 155.52 MHz clock frequency in case of the data loss due to some system error such as transmission line open or data transfer fail. Also it operates properly in case the system starts after the power failure or system maintenance. The designed circuit has especially PLL based self oscillation loop which operates on abnormal environment which is added to main oscillation loop. The measured results show that the circuit operates well with 153.52 MHz clock frequency not only on normal environment but also on abnormal environment. Rms jitter of the PLL loop is about 23 ps.

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Torpedo defense system research using HMS(Hull Mount Sonar) of PCC(Patrol Combat Corvette) (초계함용 HMS(Hull Mount Sonar)를 이용한 어뢰방어시스템 연구)

  • Kim, Hee-Earn;Kim, Young-Kil
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.11
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    • pp.2569-2574
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    • 2012
  • HMS(Hull Mount Sonar) equipment mounted on PCC(Patrol Combat Corvette) is suitably designed for active mode, and the specific character of sensor or system is not appropriate for the frequency range to detect a torpedo. In this article, in order to implement the function of detecting torpedoes with HMS of existing PCC, I will analyze the feature of input signals each PCCs and design a circuit to compensate reversely for the input signal in certain frequency. And also, I will suggest the most adequate torpedo defense system suitable for the special operating environment and the characteristic of naval vessels, implementing functions such as AGC of input signal and fixing the frequency range of different input signals per different warships.

VLSI Architecture of a Recursive LMS Filter Based on a Cyclo-static Scheduler (Cyclo-static 스케줄러를 이용한 재귀형 LMS Filter의 VLSI 구조)

  • Kim, Hyeong-Kyo
    • Journal of the Institute of Convergence Signal Processing
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    • v.8 no.1
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    • pp.73-77
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    • 2007
  • In this paper, we propose a VLSI architecture of an LMS filter based on a Cyclo-static scheduler for fast computation of LMS filteing algorithm which is widely used in adptive filtering area. This process is composed of two steps: scheduling and circuit synthesis. The scheduling step accepts a fully specified flow graph(FSFG) as an input, and generates an optimal Cyclo-static schedule in the sense of the sampling rate, the number of processors, and the input-output delay. Then the generated schedule is transformed so that the number of communication edges between the processors. The circuit synthesis part translates the modified schedule into a complete circuit diagram by performing resource allocations. The VLSI layout generation can be performed easily by an existing silicon compiler.

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Design of 2DOF(Degree-Of-Freedom) Wiener-Hopf controllers (2자유도 위너-호프 제어기 설계)

  • Cho, Yong-Seok;Min, Deuk-Gi;Choi, Goon-Ho;Lee, Jong-Sung;Kang, Ki-Won;Park, Ki-Heon
    • Proceedings of the KIEE Conference
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    • 1997.07b
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    • pp.437-440
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    • 1997
  • 제어공학에서 흔히 표준 모델이라고 불리우는 플랜트 모델은 여러 부 시스템이 서로 결합되어있는 복잡한 시스템을 단순화시킨 모델이다. 이 모델은 수학적으로 간략하게 표시된다는 장점 때문에 다변수 시스템의 최적 제어에 많이 쓰이고 있다. 그러나 이 모델은 수학적인 전개에는 편리하지만 물리적으로 판이하게 다른 신호군 즉, 외란 및 측정 잡음과 기준 입력 신호를 하나의 신호군으로 처리하는 약점이 있다. 실제로 이 구조로는 입력 추종 문제를 자유롭게 처리할 수 없는 경우가 있다. 본 연구에서는 이러한 문제를 개선하기 위하여 외란 및 측정 잡음과 기준 입력을 분리하여 처리할 수 있는 2자유도 제어기 구조를 제시하였다. 제어기 형태는 위너-호프 제어기로 주파수 영역에서 다 변수 시스템에 대한 최적 설계를 가능하게 한다.

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