• Proceedings of the Korean Information Science Society Conference
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• 2012.06a
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• pp.60-62
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• 2012

차량 전장용 임베디드 소프트웨어 플랫폼의 공개 표준인 AUTOSAR SW 플랫폼에서의 CAN에서는 송신단말에서 전달하려는 메시지가 큰 경우에는 메시지를 여러 개의 프레임들로 쪼개어 전송을 하고, 수신 단말은 쪼개진 프레임들을 하나의 메시지로 재조립한다. 이 때에 전송 오류가 발생하여, 수신 단말에 프레임이 전송되지 못할 수 있으며, AUTOSAR SW 플랫폼에서 규정하고 있는 기존의 CAN 모듈들은 이와 같은 전송 오류를 처리할 수 있는 기술인 재전송 기술이 규정되어 있지 않다. 본 논문은 AUTOSAR SW 플랫폼 기반의 CAN 통신에서 발생할 수 있는 메시지 전송 오류시에 메시지 재전송 방법에 관한 것이다. 본 논문에서는 전송오류가 발생한 프레임만을 다시 전송하여, 재전송이 효율적으로 이루어지도록 하였다.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2018.05a
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• pp.181-182
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• 2018

2015년 6월 MSC 95차 위원회에서 e-navigation 소프트웨어 품질 보증 가이드라인이 회람문서로 정식 등재되었다. 이 가이드라인은 소프트웨어 개발 라이프사이클에 따라 소프트웨어를 개발하며 필요한 품질 보증 절차 활동과 사용자의 요구를 만족시킬 수 있는 제품의 개발을 위한 인간중심설계 절차를 제시한다. 본 논문에서는 e-navigation 소프트웨어 품질보증 가이드라인을 심층분석하여 해양 임베디드 응용 소프트웨어 품질보증을 위한 사용성평가 시험절차 개발에 필요한 연관된 국제표준 및 기존 연구를 조사 분석 후 연구하였다.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.5
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• pp.1125-1131
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• 2012

According to abrupt decrese in number of farmer and ageing society, there has been a need for development of low cost agricultural robot. In this paper, a H/W and S/W platform of caterpillar type agricultural chemical dusting robot based on XP embedded system were described. The developed agricultural robot has 2 d.o.f caterpillar type driving wheel and 2 d.o.f chemical dusting spray mechanical system. The H/W platform of the agricultural robot consists of robot controller, remote controller and sensor controller. In S/W platform, 5 processes work concurrently, which are task manager, TCP-IP communication process, localization process, wheel control, and sensor control process. This robot platform has been developed for chemical dusting robot. We proved this system's validity through field test.

• Journal of Applied Reliability
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• v.7 no.4
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• pp.137-148
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• 2007

Rapid increase of embedded systems in electronic and mechanical control systems requires reliable and error-free embedded software. State-based testing methods like FSM are usually used to assure the reliability of embedded software. However, because of possibility of explosion of test cases, only partial test cases are considered in practical tests, which cannot guarantee that all the possible errors are investigated. This study proposes a test procedure based on failure mechanisms that may occur in embedded systems, which can not only assure that certain kinds of possible errors are detected but reduce the testing time. The proposed procedure is applied to vehicle air control system.

• Information and Communications Magazine
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• v.31 no.7
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• pp.32-38
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• 2014

소프트웨어-콘텐츠 산업은 IT 및 전통산업에서도 대표적인 지식산업이면서 타 산업에 대한 연관관계가 매우 높고 파급효과도 대단히 높은 산업으로 고부가가치를 실현할 수 있는 산업이다. 한국통신기술협회(TTA) 소프트웨어-콘텐츠 기술위원회(TC6)는 기반 소프트웨어 기술(공개SW, 메타데이터, 소프트웨어 품질평가, 웹서비스 등)과 융합 소프트웨어 기술(임베디드SW, 사이버-물리시스템(CPS), e-내비게이션, e-퍼블리싱 등), 그리고 디지털 콘텐츠 기술(게임, 디지털시네마, 컴퓨터그래픽 등) 분야의 표준 제정을 담당하고 있다. 본고에서는 TC6 산하 9개의 PG에서 2013년에서 현재까지 제정한 70여건의 표준에 대하여 간략하게 정리하여 제시함으로써, 향후 소프트웨어-콘텐츠 분야의 표준이 참조될 수 있는 기회가 있기를 희망하며 표준화 추진 동향에 대하여 소개 하고자 한다.

• Smart Media Journal
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• v.3 no.4
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• pp.9-15
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• 2014

A virtual platform models a processor core and the peripheral devices constituting the SoC in software. Major companies utilize a variety of platforms for product development with optimal SW+SoC integrated system architecture design and IP reuse based Top-Down design flow using a virtual platform. In this paper, we propose a virtual platform based on OpenRISC, an open source RISC based core. The proposed virtual platform supports high speed emulation of approximately 20 MIPS using DBT (Dynamic Binary Translation).

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.4
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• pp.245-251
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• 2014

Wireless Sensor Networks(WSNs) are applied to many monitoring applications. Present sensor nodes can perform many functions at the same time and contain complex software. During the lifetime of sensor nodes, they are required to reprogram their software because of their new functions, software, software bug fixes. The nodes are inaccessible physically or it is very difficult to upgrade their software by one by one. To upgrade the software of sensor nodes in WSNs remotely, this paper presents an energy efficient method by selecting an optimal relay node. The CHR(Cluster Head Relay) method is compared with SPIN and RANDOM method. Three methods are simulated in NS-2 with the same environmental parameters. Simulation results show that CHR shows faster update time and less power consumption compared with other two methods.

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.6
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• pp.307-314
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• 2014

Recently, software reliability and safety issues are seriously considered since failures of embedded systems may cause the damages of human lifes. For verifying and testing embedded software, execution environment including sensors and actuators should be prepared in the actual plants or virtual forms on PC. In this paper, we provide the virtual prototype based code simulation techniques and testing framework on PC. Virtual prototypes are generated by combining the Adobe's Flash SWF images corresponding to the state machine of HW or environment components. Code simulation on PC is possible by replacing the device drivers into virtual drivers which connect to virtual prototypes. Also, testing is performed by controlling the states of virtual prototype and simulators. By using these tools, embedded software can be executed in the earlier development phase and the efficiency and SW quality can be enhanced.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.9_10
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• pp.485-496
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• 2008

As the complexity of SoC (System-on-Chip) design increases dramatically. traditional system performance analysis and verification methods based on RTL (Register Transfer Level) are no more valid for increasing time-to-market pressure. Therefore a new design methodology is desperately required for system verification in early design stages. and hardware software (HW-SW) cosimulation at TLM (Transaction Level Modeling) level has been researched widely for solving this problem. However, most of HW-SW cosimulators support few restricted ion levels only, which makes it difficult to integrate HW-SW cosimulators with different ion levels. To overcome this difficulty, this paper proposes a multipurpose framework for HW SW cosimulation to provide systematic SoC design flow starting from software application design. It supports various design techniques flexibly for each design step, and various HW-SW cosimulators. Since a platform design is possible independently of ion levels and description languages, it allows us to generate simulation models with various ion levels. We verified the proposed framework to model a commercial SoC platform based on an ARM9 processor. It was also proved that this framework could be used for the performance optimization of an MJPEG example up to 44% successfully.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.5
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• pp.1139-1144
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• 2008

In this paper, we propose an automatic generation method of transaction level(TL) model from algorithmic model to verify system specification fast and effectively using virtual platform. The TL virtual platform including structural properties such as timing, synchronization and real-time is one of the effective verification frameworks. However, whenever change system specification or HW/SW mapping, we must rebuild virtual platform and additional design/verification time is required. And the manual description is very time-consuming and error-prone process. To solve these problems, we build TL library which consists of basic components of virtual platform such as CPU, memory, timer. We developed a set of design/verification tools in order to generate a virtual platform automatically. Our tools generate a virtual platform which consists of embedded real-time operating system (RTOS) and hardware components from an algorithmic modeling. And for communication between HW and SW, memory map and device drivers are generated. The effectiveness of our proposed framework has been successfully verified with a Joint Photographic Expert Group (JPEG) and H.264 algorithm. We claim that our approach enables us to generate an application specific virtual platform $100x{\tims}1000x$ faster than manual designs. Also, we can refine an initial platform incrementally to find a better HW/SW mapping. Furthermore, application software can be concurrently designed and optimized as well as RTOS by the generated virtual platform