• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.1
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• pp.219-224
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• 2017

Recently, the importance of DRAM is very significant not only in embedded systems and mobile devices but also in high-end modern microprocessors and multicore processors. To keep up with this, both industry and academia have actively studied various types of future DRAMs. Therefore, accurate DRAM model is requisite when evaluating the microprocessor performance. In this paper, a microprocessor trace-driven simulator which can couple with the cycle-accurate DRAM simulator has been developed. Using SPEC 2000 benchmarks as input, the effect of cycle-accurate DDR3 model on the microprocessor performance has been evaluated.

• Proceedings of the Korea Information Processing Society Conference
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• 2015.10a
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• pp.24-26
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• 2015

최근 많이 활용되고 있는 라즈베리파이에 기반한 임베디드 시스템을 구축함에 있어서 사용자는 회로에 대한 이해와 하드웨어 비용이라는 측면에서 어려움을 갖게 되는 경우가 많다. 본 논문에서는 이러한 시스템을 가상으로 테스트할 수 있는 솔루션을 제안하고자 한다. 개발된 프로그램은 사용자가 실제 회로를 구성하는 것과 같이 가상의 공간에서 모듈을 배치하고 모듈 간에 선을 연결하는 것으로 회로를 구성하고 동작을 테스트할 수 있다 프로그램은 회로편집기, 인터프리터, 시뮬레이터의 세 가지 요소로 구성되어 있으며 전체 9개의 모듈을 제공하고 있다. 각각의 모듈은 제조사에서 제공하는 데이터 시트와 제원을 바탕으로 실제 회로 테스트를 거쳐 추상화하는 작업을 수행하였다. 개발된 프로그램의 품질수준을 한층 끌어올린다면 비용절감과 학습, 교육 측면에서 유용하게 이용될 수 있으며, 전기물리엔진의 구현, 실제 보드로 포팅이 가능한 수준의 인터프리터, 시뮬레이션 로직의 일반화가 필요할 것으로 판단된다.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.6
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• pp.94-105
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• 2008

Numerous platforms have been developed for ZigBee-based network embedded systems. Also, operating systems like TinyOS have been installed to facilitate efficient implementation of wireless sensor network applications which collect data, and/or execute commands. First of all, porting an operating system on a new platform may need invention of a substitute for a required but unsupported hardware component. This paper presents a multiplexed virtual system timer for a platform without a counter comparator which we have contrived to emulate by using an extra counter. Such porting also injects unexpected faults which cause a variety of painful failures. Unfortunately, TinyOS requires to handle a lot of asynchronous hardware interrupts which are hard to trace during debugging. Besides, simulators are not available for a new platform since the models of hardware on the platform are not usually developed, yet. We propose novel instrumentation techniques which can be used to effectively trace the bugs in such lack of debugging environment. These techniques are used to identify and fix a great deal of nasty issues in porting TinyOS 2.0 on MG2400 and MG2455 platforms made by RadioPulse Inc.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.9_10
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• pp.485-496
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• 2008

As the complexity of SoC (System-on-Chip) design increases dramatically. traditional system performance analysis and verification methods based on RTL (Register Transfer Level) are no more valid for increasing time-to-market pressure. Therefore a new design methodology is desperately required for system verification in early design stages. and hardware software (HW-SW) cosimulation at TLM (Transaction Level Modeling) level has been researched widely for solving this problem. However, most of HW-SW cosimulators support few restricted ion levels only, which makes it difficult to integrate HW-SW cosimulators with different ion levels. To overcome this difficulty, this paper proposes a multipurpose framework for HW SW cosimulation to provide systematic SoC design flow starting from software application design. It supports various design techniques flexibly for each design step, and various HW-SW cosimulators. Since a platform design is possible independently of ion levels and description languages, it allows us to generate simulation models with various ion levels. We verified the proposed framework to model a commercial SoC platform based on an ARM9 processor. It was also proved that this framework could be used for the performance optimization of an MJPEG example up to 44% successfully.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.3
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• pp.111-117
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• 2018

Heterogeneous multi-core environment integrated with different functional cores is the powerful tool for the embedded system that became more complex and diverse. Specialized application requires one chip solution with different operating system over different cores. But this heterogeneity causes difficult configuration of the development environment, makes hard to develop and test software. We show the environment of heterogeneous multi-core processing can be mapped to symmetric multi-core environment. We construct Linux based RPMsg for the data exchange between processes similar with the heterogeneous multi-core RPMsg and experiment that the proposed environment can be used to reduce the steps of the heterogeneous multi-core application development. With this simplification, we suggest simulation method for easy development and debugging the heterogeneous multicore environment that makes complex steps to simple.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.35 no.4
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• pp.359-365
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• 2011

A mobile surveillance robot is defined as a surveillance robot system that is mounted on a mobile platform and is used to protect public areas such as airports or harbors from invaders. The mobile surveillance robot that is mounted on a mobile platform consists of a gun module, a camera system module, an embedded control system, and AHRS (Attitude and Heading Reference System). It has two axis control systems for controlling its elevation and azimuth. In order to obtain stable images for targeting invaders, this system requires a stabilizer to compensate any disturbance due to vehicle motion. In this study, a virtual model of a mobile surveillance robot has been created and ADAMS/Matlab simulations have been performed to verify the suitability of the proposed stabilization algorithm. Further, the suitability of the stabilization algorithm has also been verified using a mock-up of the mobile surveillance robot and a 6-DOF (Degree Of Freedom) motion simulator.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.4
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• pp.389-400
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• 2008

As the wireless network technologies and the capability of the mobile terminals are evolving, advanced peer to peer applications for mobile users are attracting interests. In this paper, we propose the mobile P2P communication platform(MPCP) which provides transparency to the wireless network technologies and solutions to the limited resources of the mobile terminals. MPCP classifies the connection into two levels: a virtual channel and a session. A virtual channel is the network layer connection between the terminals whereas a session is the application layer connection. MPCP classifies the sessions into four types and applies different scheduling priority and data processing policies such as segmentation and reassembly. It selects proper wireless network technologies depending on the distance between the communication endpoints. To acquire dynamically changed access address, we harness the Session Initiation Protocol. We implemented MPCP on embedded Linux simulator and utilized the implementation in mobile P2P service development. For the quantitative analysis, we compared the performance of MPCP with that of ftp. Regardless of the number of simultaneous sessions, MPCP maintains the relative performance.

• Journal of Internet Computing and Services
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• v.21 no.5
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• pp.149-157
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• 2020

Recently, as interest in artificial intelligence has increased, many studies have been conducted to implement AI processors. However, the AI processor requires functional verification as well as performance verification on whether the AI processor is suitable for the application. In this paper, We propose an AI processor performance analyzer that can verify the application performance and explore the limitations of the processor. By Using the performance analyzer, we explore the limitations of the AI processor and optimize the AI model to fit an AI processor in image recognition and speech recognition applications.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.3
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• pp.301-306
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• 2008

Drivers are becoming more fatigued and uncomfortable with increase in traffic density, and this condition can lead to slower reaction time. Consequently, they may face the danger of traffic accidents due to their inability to cope with frequent gear shifting. To reduce this risk, some drivers prefer automatic transmission (AT) over manual transmission (MT). The AT offers more superior drivability and less shifting shock than the MT; therefore, the AT market share has been increasing. The AT is controlled by an electronic control unit (ECU), which provides better shifting performance. The transmission control unit (TCU) is a higher-value-added product, so the companies that have advanced technologies end to evade technology transfer. With more cars gradually using the ECU, the TCU is expected to be faster and more efficient for organic communication and arithmetic processing between the control systems than the l6-bit controller. In this paper, the model of an automatic transmission vehicle using MATLAB/Simulink is developed for the Hardware in-the-Loop (HIL) simulation with a 32-bit embedded system, and also the AT control logic for shifting is developed by using MATLAB/Simulink. The developed AT control logic, transformed automatically by real time workshop toolbox, is loaded to a 32-bit embedded system platform based on Freescale's MPC565. With both vehicle model and 32-bit embedded system platform, we make the HIL simulation system and HIL simulation of AT based on real time operating system (RTOS) is performed. According to the simulation results, the developed HIL simulator will be used for the performance test of embedded system for AT with low cost and effort.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.11A
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• pp.1059-1067
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• 2006

AODV(Ad-hoc On-demand Distance Vector) routing protocol was devised for use of mobile nodes in Ad-hoc network. When we use the AODV routing protocol in Ad-hoc networks with high mobility, disturbance of optimized route path and link break occur. In order to solve the shortcomings, this paper proposes a new routing protocol in which new routing control messages are added to the existing AODV. The proposed protocol minimizes link break and transmission delay while is able to secure the optimized route path constantly in changes of network topology The performance of the proposed routing protocol was evaluated by using us2 network simulator. The actual Ad-hoc network test bed provides us the most reliable experimental data for Ad-hoc networks. In order to support this experimental environment, the dissertation also developed an efficient embedded system on which AODV routing protocol, NAT, Netfilter can run and other event message can be verified without declining efficiency. The correct operation of AODV routing protocol has been verified in both the Ad-hoc network test bed in which the embedded system was used, and Ad-hoc networks linked with Ethernet backbone network.