• The Journal of the Korea Contents Association
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• v.17 no.3
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• pp.589-595
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• 2017

We present an estimation model for optimal channel capacity required to data traffic transmission. The optimal channel capacity should be calculated in order to satisfy the permitted transmission delay of each wireless data services. Considering the discrete-time operation of digital communication systems and batch arrival of packet-switched traffic for various wireless services, $Geo^x$/G/1 non-preemptive priority queueing model is analyzed. Based on the heuristic interpretation of the mean waiting time, the mean waiting times of various data packets which have the service priority. Using the mean waiting times of service classes, we propose the procedure of determining the optimal channel capacity to satisfy the quality of service requirement of the mean delay of wireless services. We look forward to applying our results to improvement in wireless data services and economic operation of the network facilities.

• Journal of Korea Multimedia Society
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• v.3 no.4
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• pp.407-415
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• 2000

The ultimate goal of flow control in the semiconductor fabrication process, one of the most equipment-intensive and complex manufacturing process, is to reduce lead time and work in process. In this paper, we propose stand alone layout in the form of job shop using group technology to improve the Productivity and eliminate the inefficiency in FMS (flexible manufacture system). The performance of stand alone layout and in-line layout are analyzed and compared while varying number of device variable chanties. The analysis of in-line layout is obtained by examining its adoption in the memory products of semiconductor factory. The comparison is performed through simulation using ProSys; a window 95 based discrete system simulation software, as a tool for comparing performance of two proposed layouts. The comparison demonstrates that when the number of device variable change is small, in-line layout is more efficient in terms of production Quantity. However, as the number of device variable change is more than 14 times, stand alone layout prevails over in-line layout.

• Journal of the Korea Society for Simulation
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• v.18 no.3
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• pp.1-11
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• 2009

This paper illustrates a case study of PLC logic simulation in a car manufacturing system. It was developed to simulate and verify PLC control program for automobile panel AS/RS. Because car models become varied, the complexity of supply problem is increasing in the car manufacturing system. To cope with this problem, companies use the AS (automated storage) and RS (retrieval system) but it has logical complexity. Industrial automated process uses PLC code to control the AS/RS, however control information and control codes (PLC code) are difficult to understand. This paper suggests a PLC simulation environment, using 3D models and PLC code with realistic data. Data used in this simulation is based on realistic 3D model and I/O model, using actual size and PLC signals, respectively. The environment is similar to a real factory; users can verify and test the PLC code using this simulation before the implementation of AS/RS. Proposed simulation environment can be used for test run of AS/RS to reduce implementation time and cost.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.39 no.1
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• pp.19-26
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• 2015

This paper proposes a design method for improving the frequency-domain performance reliability of dynamic systems with uncertain and degrading components. Discrete frequencies are used in this method as surrogates for the frequency band of interest, and the conformance of the frequency responses to the specification at these frequencies is utilized to model the frequency-domain performance reliability. A meta-model for the frequency responses, an extreme-value event, and the set-theory are integrated to improve the computational efficiency of the reliability estimation. In addition, a sample-based approach is presented to evaluate and optimize the estimated performance reliability. A case study of a vibration absorber system showed that the proposed design method has engineering applications.

• Journal of Institute of Control, Robotics and Systems
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• v.18 no.4
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• pp.295-301
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• 2012

This paper deals with the design of robust DSMC (Discrete-Time Sliding Mode Control) scheme in order to overcome system uncertainty in steering system with mechanically joined structure. The proposed control scheme is one of robust control schemes based on system dynamics. Therefore, system dynamics required is not obtained from physical law but SCM (Signal Compression Method) through experiment in order to avoid complicate mathematical development and save time. However, SCM has a shortcoming that is the limitation of with $2^{nd}$ order linear model which does not include the dynamic of high-frequency band. Thus, considering system uncertainty, DSMC is designed. In addition, to reduce the chattering problem of DSMC, DSMC is derived from the reaching law and the Lyapunov stability condition. It is found that the proposed control scheme has robustness in spite of the perturbation of system uncertainty through computer simulation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.9
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• pp.1617-1624
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• 2006

This paper presents system modeling, modified space vector PWM implementation and design of a closed loop controller of the Z-source inverter which consists of L and C components and shoot-through zero vectors for DGS. Zero vector periods of SVPWM utilized to boost DC-link voltage instead of conventional DC/DC converter and transformer. Only two shoot-through vut(nn are used for DC link voltage control during one switching period without loss of non-zero vectors. Discrete time sliding mode controller, robust servomechanism controller are designed to realize fast and no-overshoot current response and a steady state voltage error. Simulation results are shows the effectiveness of the proposed algorithm.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.1
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• pp.1-5
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• 2014

In this paper, we propose an optimal fixed-lag FIR (Finite-Impulse-Response) smoother for a class of discrete time-varying state-space signal models. The proposed fixed-lag FIR smoother is linear with respect to inputs and outputs on the recent finite horizon and estimates the delayed state so that the variance of the estimation error is minimized with the unbiased constraint. Since the proposed smoother is derived with system inputs, it can be adapted to feedback control system. Additionally, the proposed smoother can give more general solution than the optimal FIR filter, because it reduced to the optimal FIR filter by setting the fixed-lag size as zero. A numerical example is presented to illustrate the performance of the proposed smoother by comparing with an optimal FIR filter and a conventional fixed-lag Kalman smoother.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1990.04a
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• pp.22-31
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• 1990

In this paper, we have studied modelling and simulation of computer communication protocols theoretically. After describing a definition and functions of communication protocols, we have classified models for protocol design. And, in those protocol models, by endowing Timed Petri Net (TPN) models with a time function .tau., we have proposed a structural definition of TPN models. Furthermore, in order to complement Petri Net Based models with some problems, we have introduced the Discrete EVent system Specification (DEVS) concept in system simulation field. As an important result of our study, we have presented a theorem, which says that a TPN model becomes a DEVS model, and proved it. According to the theorem, we can perform efficient simulation by using the DEVS model transformed from a TPN model when we intend the TPN model to be simulated, otherwise we design another simulation model for it.

• Journal of the Korean Institute of Intelligent Systems
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• v.26 no.5
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• pp.368-374
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• 2016

This paper presents an experimental study on an electrical circuit model of the TiO2-based nano-wired memristor device for neuromophic applications. The electrical circuit equivalent model of the proposed memristor device consists of several electronics components and some passive devices including operational amplifiers, multipliers, resistors and capacitors. In order to verify the proposed design, both of simulation (using PSPICE) as well as hardware implementation were performed for the analysis of the memristor circuit with time waveforms, frequency spectra, I-V curves and power curves. The gained results from the measured data showed a good agreement with the simulation result that confirm the proposed idea.

• Journal of Korea Society of Industrial Information Systems
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• v.6 no.4
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• pp.75-80
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• 2001

In this paper, we propose a new chaotic synchronization algorithm of using HVPM(Hyperchaotic Volume Preserving Maps) model. The proposed chaotic equation, that is, HVPM model which consists of three dimensional discrete-time simultaneous difference equations and shows uniquely random chaotic attractor using nonlinear maps and modulus function. Pecora and Carrol have recently shown that it is possible to synchronize a chaotic system by sending a signal from the drive chaotic system to the response subsystem. We proposed coupled synchronization algorithm in order to accomplish discrete time hyperchaotic HVPM signals. In the numerical results, two hyperchaotic signals are coupled and driven for accomplishing to the chaotic synchronization systems. And it is demonstrated that HVPM signals have shown the chaotic behavior and chaotic coupled synchronization.