• Title/Summary/Keyword: 영상 프로세서

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System Development of Precision Vision Measurement Using Fuzzy C-means and Possibilistic C-Means Algorithm (Fuzzy C-means와 확률 C-Means를 결합한 정밀 영상측정 시스템 개발)

  • 김석현
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1999.12a
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    • pp.315-323
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    • 1999
  • The measuring systems of auto-parts are most of greater part very expensive. This paper tries to study to make a low-cost measuring equipment. There's several kinds of parts in automobile. In this study, we take aircon-switch called magnet coil-housing as the object of measurements. The measurements of this product is currently in difficult situations at factory. In the case of the mesuring objects being big sizes and camera sensor having under 410000 pixels, the key point is the number of pixels not to be changed whenever the same object is measured under the same position. We modified and used fuzzy c-means algorithm to get mostly without the change of the numbers of pixels exactly. Also, the standardized ruler is necessary to measure the length of the object but it is not easy to get the precised ruler. Therefore, the standard length has been taken as the mean value of the pixels in the previous passed objects manually obtained at factory. The results are displayed on monitor and transferred these signals to the microprocessor through RSC-232 port to determine a good or bad of products.

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A New Predictive EC Algorithm for Reduction of Memory Size and Bandwidth Requirements in Wavelet Transform (웨이블릿 변환의 메모리 크기와 대역폭 감소를 위한 Prediction 기반의 Embedded Compression 알고리즘)

  • Choi, Woo-Soo;Son, Chang-Hoon;Kim, Ji-Won;Na, Seong-Yu;Kim, Young-Min
    • Journal of Korea Multimedia Society
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    • v.14 no.7
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    • pp.917-923
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    • 2011
  • In this paper, a new prediction based embedded compression (EC) codec algorithm for the JPEG2000 encoder system is proposed to reduce excessive memory requirements. The EC technique can reduce the 50 % memory requirement for intermediate low-frequency coefficients during multiple discrete wavelet transform (DWT) stages compared with direct implementation of the DWT engine of this paper. The LOCO-I predictor and MAP are widely used in many lossless picture compression codec. The proposed EC algorithm use these predictor which are very simple but surprisingly effective. The predictive EC scheme adopts a forward adaptive quantization and fixed length coding to encoding the prediction error. Simulation results show that our LOCO-I and MAP based EC codecs present only PSNR degradation of 0.48 and 0.26 dB in average, respectively. The proposed algorithm improves the average PSNR by 1.39 dB compared to the previous work in [9].

High Performance Coprocessor Architecture for Real-Time Dense Disparity Map (실시간 Dense Disparity Map 추출을 위한 고성능 가속기 구조 설계)

  • Kim, Cheong-Ghil;Srini, Vason P.;Kim, Shin-Dug
    • The KIPS Transactions:PartA
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    • v.14A no.5
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    • pp.301-308
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    • 2007
  • This paper proposes high performance coprocessor architecture for real time dense disparity computation based on a phase-based binocular stereo matching technique called local weighted phase-correlation(LWPC). The algorithm combines the robustness of wavelet based phase difference methods and the basic control strategy of phase correlation methods, which consists of 4 stages. For parallel and efficient hardware implementation, the proposed architecture employs SIMD(Single Instruction Multiple Data Stream) architecture for each functional stage and all stages work on pipelined mode. Such that the newly devised pipelined linear array processor is optimized for the case of row-column image processing eliminating the need for transposed memory while preserving generality and high throughput. The proposed architecture is implemented with Xilinx HDL tool and the required hardware resources are calculated in terms of look up tables, flip flops, slices, and the amount of memory. The result shows the possibility that the proposed architecture can be integrated into one chip while maintaining the processing speed at video rate.

CGS System based on Three-Dimensional Character Modeling I (Part1:About Non-Digital Process) (3차원 캐릭터 모델기반 CGS System 구축 I (Part1:Non-Digital Process에 관하여))

  • Cho, Dong-Min
    • Journal of Korea Multimedia Society
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    • v.11 no.11
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    • pp.1592-1600
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    • 2008
  • This study is to help creative idea generation based on the theory of the 'reconstruction of character shape image elements', and aims to extrusion of creative and diverse shapes with combination of image elements upon computing creative image generation. In order to suggest the design generation methodology for the maximization of idea generation ability and to overcome restriction of thinking out of existing idea generation methodology, it has suggested the CGS(Character Generation System) that is a creative idea generation methodology identified and complemented the problem of the existing computerized idea generation(PDS with Proportion) method out of the preceded studies on the creative idea generation methodologies. this study is expected to have effectives as one method for idea generation or creative image generation assistance during the 3D character development process, and to serve as an assistance to overcome the restriction of the character shape image generation through diverse idea generations.

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An Efficient Data-reuse Deblocking Filter Algorithm for H.264/AVC (H.264/AVC 비디오 코덱을 위한 효율적인 자료 재사용 디블록킹 필터 알고리즘)

  • Lee, Hyoung-Pyo;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.44 no.6
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    • pp.30-35
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    • 2007
  • H.264/AVC provides better quality than other algorithms by using a deblocking filter to remove blocking distortion on block boundary of the decoded picture. However, this filtering process includes lots of memory accesses, which cause delay of overall decoding time. In this paper, we propose a data-reuse algorithm to speed up the process for the deblocking filter. To reuse the data, a new filtering order is suggested. By using this order, we reduce the memory access and accelerate the deblocking filter. The modeling of proposed algorithm is compiled under ARM ADS1.2 and simulated with Armulator. The results of the experiment compared with H.264/AVC standard are achieved on average 58.45% and 57.93% performance improvements at execution cycles and memory access cycles, respectively.

Development of a Cause Analysis Program to Risky Driving with Vision System (Vision 시스템을 이용한 위험운전 원인 분석 프로그램 개발에 관한 연구)

  • Oh, Ju-Taek;Lee, Sang-Yong
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.8 no.6
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    • pp.149-161
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    • 2009
  • Electronic control systems of vehicle are rapidly developed to keep balance of a driver`s safety and the legal, social needs. The driver assistance systems are putted into practical use according to the cost drop in hardware and highly efficient sensor, etc. This study has developed a lane and vehicle detection program using CCD camera. The Risky Driving Analysis Program based on vision systems is developed by combining a risky driving detection algorithm formed in previous study with lane and vehicle detection program suggested in this study. Risky driving detection programs developed in this study with information coming from the vehicle moving data and lane data are useful in efficiently analyzing the cause and effect of risky driving behavior.

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A Study on the Improvement of Vehicle Recognition Rate of Vision System (Vision 시스템의 차량 인식률 향상에 관한 연구)

  • Oh, Ju-Taek;Lee, Sang-Yong;Lee, Sang-Min;Kim, Young-Sam
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.10 no.3
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    • pp.16-24
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    • 2011
  • The vehicle electronic control system is being developed as the legal and social demand for ensuring driver's safety is rising. The various Driver Assistance Systems with various sensors such as radars, camera, and lasers are in practical use because of the falling price of hardware and the high performance of sensor and processer. In the preceding study of this research, the program was developed to recognize the experiment vehicle's driving lane and the cars nearby or approaching the experiment vehicle throughout the images taken by CCD camera. In addition, the 'dangerous driving analysis program' which is Vision System basis was developed to analyze the cause and consequence of dangerous driving. However, the Vision system developed in the previous studyhad poor recognition rate of lane and vehicles at the time of passing a tunnel, sunrise, or sunset. Therefore, through mounting the brightness response algorithm to the Vision System, the present study is aimed to analyze the causes of driver's dangerous driving clearly by improving the recognition rate of lane and vehicle, regardless of when and where it is.

ASIP Design for Real-Time Processing of H.264 (실시간 H.264/AVC 처리를 위한 ASIP설계)

  • Kim, Jin-Soo;SunWoo, Myung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.44 no.5
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    • pp.12-19
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    • 2007
  • This paper presents an ASIP(Application Specific Instruction Set Processor) for implementation of H.264/AVC, called VSIP(Video Specific Instruction-set Processor). The proposed VSIP has novel instructions and optimized hardware architectures for specific applications, such as intra prediction, in-loop deblocking filter, integer transform, etc. Moreover, VSIP has hardware accelerators for computation intensive parts in video signal processing, such as inter prediction and entropy coding. The VSIP has much smaller area and can dramatically reduce the number of memory access compared with commercial DSP chips, which result in low power consumption. The proposed VSIP can efficiently perform in real-time video processing and it can support various profiles and standards.

Implementation of a Task Level Pipelined Multicomputer RV860-PIPE for Computer Vision Applications (컴퓨터 비젼 응용을 위한 태스크 레벨 파이프라인 멀티컴퓨터 RV860-PIPE의 구현)

  • Lee, Choong-Hwan;Kim, Jun-Sung;Park, Kyu-Ho
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.1
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    • pp.38-48
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    • 1996
  • We implemented and evaluated the preformance of a task level pipelined multicomputer "RV860-PIPE(Realtime Vision i860 system using PIPEline)" for computer vision applications. RV860-PIPE is a message-passing MIMD computer having ring interconnection network which is appropriate for vision processing. We designed the node computer of RV860-PIPE using a 64-bit microprocessor to have generality and high processing power for various vision algorithms. Furthermore, to reduce the communication overhead between node computers and between node computer and a frame grabber, we designed dedicated high speed communication channels between them. We showed the practical applicability of the implemented system by evaluting performances of various computer vision applications like edge detection, real-time moving object tracking, and real-time face recognition.

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A Wavefront Array Processor Utilizing a Recursion Equation for ME/MC in the frequency Domain (주파수 영역에서의 움직임 예측 및 보상을 위한 재귀 방정식을 이용한 웨이브프런트 어레이 프로세서)

  • Lee, Joo-Heung;Ryu, Chul
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.10C
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    • pp.1000-1010
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    • 2006
  • This paper proposes a new architecture for DCT-based motion estimation and compensation. Previous methods do riot take sufficient advantage of the sparseness of 2-D DCT coefficients to reduce execution time. We first derive a recursion equation to perform DCT domain motion estimation more efficiently; we then use it to develop a wavefront array processor (WAP) consisting of processing elements. In addition, we show that the recursion equation enables motion predicted images with different frequency bands, for example, from the images with low frequency components to the images with low and high frequency components. The wavefront way Processor can reconfigure to different motion estimation algorithms, such as logarithmic search and three step search, without architectural modifications. These properties can be effectively used to reduce the energy required for video encoding and decoding. The proposed WAP architecture achieves a significant reduction in computational complexity and processing time. It is also shown that the motion estimation algorithm in the transform domain using SAD (Sum of Absolute Differences) matching criterion maximizes PSNR and the compression ratio for the practical video coding applications when compared to tile motion estimation algorithm in the spatial domain using either SAD or SSD.