• The Transactions of the Korea Information Processing Society
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• v.5 no.8
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• pp.2027-2040
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• 1998

In this paper, we present efficient reconfigurable mesh algorithms for transforming between a binary image and its corresponding boundary code. These algorithms use $n\timesn\timesn$ processors when the size of the binary image is $n\timesn$. Recent published results show that these transformations can be done in O(1) time using $O(n^4)$ processors. The number of processors used by these algorithms is very large compared to the number of pixels in the image. Here, we present fast transformation algorithms which use $n^3 processors only. the transformation from a houndary code to a binary image takes O(1) time, and the converse transformation takes O(log n) time.

• Journal of the Korean Institute of Intelligent Systems
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• v.20 no.3
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• pp.362-367
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• 2010

In this paper, we describe implementation of FPGA-based Nios II embedded processor system and linux device driver for image monitoring system which is supplement weakness for fixed surveillance area of existing CCTV system and by manual operation of the camera's moving. Altera Nios II processor 8.0 is supported MMU which is stable and efficient managed memory. We designed the image monitoring and control system by using Altera Nios II soft-core processor system which is flexible in various application and excellent adaptability. By implementation of camera device driver and VGA decvice driver for Linux-based Nios II system, we implemented image serveillance system for Nios II embedded processor system.

• Journal of the Korea Society of Computer and Information
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• v.16 no.1
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• pp.1-9
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• 2011

Recently, as mobile multimedia devices are used more and more, the needs for high-performance and low-energy multimedia processors are increasing. Application-specific integrated circuits (ASIC) can meet the needed high performance for mobile multimedia, but they provide limited, if any, generality needed for various application requirements. DSP based systems can used for various types of applications due to their generality, but they require higher cost and energy consumption as well as less performance than ASICs. To solve this problem, this paper proposes a single instruction multiple data (SIMD) based many-core processor which supports high-performance and low-power image data processing while keeping generality. The proposed SIMD based many-core processor composed of 16 processing elements (PEs) exploits large data parallelism inherent in image data processing. Experimental results indicate that the proposed SIMD-based many-core processor higher performance (22 times better), energy efficiency (7 times better), and area efficiency (3 times better) than conversional commercial high-performance processors.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.983-986
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• 2003

본 논문에서는 TCP/IP 기반에서 JPEG 변환과 마이크로프로세서 8051을 이용 원거리에 있는 Device를 PDA로 제어하는 영상감시 시스템에 대해 연구하였다. 우선 서버는 카메라를 이용하여 영상을 획득하고 획득한 영상에 대해 JPEG Encoding을 한 후, 인터넷을 통해 PDA로 전송한다. PDA는 수신한 JPEG Data를 가지고 Decoding을 하고 사용자에게 영상을 보여주게 된다. Device는 카메라, 서보모터, 마이크로프로세서 8051로 구성되어 있으며 8051에 의해서 서보모터를 제어해서 카메라의 방향을 변경한다. 사용자는 서버에서 보내는 영상을 PDA로 수신 실시간으로 영상을 감시한다. 그리고 용 원거리에 있는 서버에 제어신호를 보내 자신이 원하는 방향으로 카메라의 위치를 제어 할 수 있는 시스템을 구현하였다.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1806_1807
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• 2009

영상처리시스템은 대량의 데이터를 고속으로 처리해야하기 때문에 고성능의 프로세서를 요구한다. 카메라의 성능은 점차 해상도가 높아져서 데이터가 많아지고 있는 반면 프로세서의 성능은 물리적인 한계로 인해서 단일 프로세서로는 속도 향상에 한계에 부딪히고 있다. 최근 CPU업계에서의 추세는 단일코어의 성능향상 한계로 인해 점차 코어의 개수를 늘리는 방v향으로 개발이 진행되고 있는데 이와 같이 병렬 프로세싱을 이용해서 영상처리시스템을 개발하는 연구가 최근 진행되고 있다. 병렬처리프로세싱 방법의 하나로 그래픽카드의 프로세서인 GPU를 사용하는 방법이 많이 시도되고 있다. 본 연구에서는 GPU를 이용하여 카메라의 모션을 추적하는 시스템을 실시간 시스템으로 개발하는 방법을 소개하고자 한다.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.41 no.1
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• pp.9-18
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• 2004

This paper presents an efficient image compression method for memory reduction in multimedia processor which can be simply implemented in hardware and provides high performance. The multimedia processor, which includes processing of high-resolution images and videos, requires large memories: they are external frame memories to store frames and internal line memories for implementing some linear filters. If we can reduce those memories by adopting a simple compression method in multimedia processor, it will strengthen its cost competitiveness. There exist many standards for efficiently compressing images and videos. However, those standards are too complex for our purpose and most of them are 2-D block-based methods, which do not support raster scanned input and output. In this paper, we propose a low-complexity compression method which has good performance, can be implemented with simple hardware logic, and supports raster scan. We have adopted 1${\times}$8 Hadamard transform for simple implementation in hardware and compression efficiency. After analyzing the coefficients, we applied an adaptive thresholding and quantization. We provide some simulation results to analyze its performance and compare with the existing methods. We also provide its hardware implementation results and discuss about cost reduction effects when applied in implementing a multimedia processor.

• The KIPS Transactions:PartA
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• v.18A no.2
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• pp.45-52
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• 2011

In the past, a patient went to the room where an ultrasound image diagnosis device was set, and then he or she was examined by a doctor. However, currently a doctor can go and examine the patient with a handheld ultrasound device who stays in a room. However, it was implemented with only fundamental functions, and can not meet the high performance required by the focusing algorithm of ultrasound beam which determines the quality of ultrasound image. In addition, low energy consumption was satisfied for the mobile ultrasound device. To satisfy these requirements, this paper proposes a high-performance and low-power single instruction, multiple data (SIMD) based multi-core processor that supports a representative beamforming algorithm out of several focusing methods of mobile ultrasound image signals. The proposed SIMD multi-core processor, which consists of 16 processing elements (PEs), satisfies the high-performance required by the beamforming algorithm by exploiting considerable data-level parallelism inherent in the echo image data of ultrasound. Experimental results showed that the proposed multi-core processor outperforms a commercial high-performance processor, TI DSP C6416, in terms of execution time (15.8 times better), energy efficiency (6.9 times better), and area efficiency (10 times better).

• 전자공학회논문지 IE
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• v.47 no.3
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• pp.1-6
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• 2010

In this paper, it is designed a processor using embedded system so that moving picture can be expressed on LED electric sign board which has been expressed a simple message only like as a character or graphic. It has been fabricated a moving picture LED electric sign board which is composed to a video processor and LED display panel, in order to be able to express a digital moving picture of 24 bits that is transmitted from embedded system. It includes gamma adjustment, brightness, color contrast control, a schedule function, expression image conversion by the Internet and memory device. Also, an application program based Windows CE is designed so that a character, graphic, and moving picture can be expressed on a small LED electric sign board.

• Journal of the Korea Society of Computer and Information
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• v.16 no.8
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• pp.119-128
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• 2011

This paper introduces design space exploration of many-core processors that meet high performance and low power required by the beamforming algorithm of image signals of mobile ultrasound. For the design space exploration of the many-core processor, we mapped different number of ultrasound image data to each processing element of many-core, and then determined an optimal many-core processor architecture in terms of execution time, energy efficiency and area efficiency. Experimental results indicate that PE=4096 and 1024 provide the highest energy efficiency and area efficiency, respectively. In addition, PE=4096 achieves 46x and 10x better than TI DSP C6416, which is widely used for ultrasound image devices, in terms of energy efficiency and area efficiency, respectively.

• Proceedings of the Korea Information Processing Society Conference
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• 2019.10a
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• pp.8-10
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• 2019

열화상 장비는 빛이 없는 암흑 상태에서도 물체에서 발산하는 적외선을 탐지하여 이를 영상으로 제공하는 장비이다. 이러한 장점으로 기존 활용되던 군사 분야와 더불어 자동차 및 감시시스템 등 다양한 민수 분야로 활용분야가 넓어지고 있다. 따라서 기존 방식인 FPGA 기반 열화상 이미지 모듈은 민수 시장의 다양한 요구사항과 환경을 반영하기에는 힘들 실정이다. 그에 따라 FPGA 기반 시스템의 단점을 보완하고 추가적인 요구사항을 만족하는 시스템의 필요성이 대두되었다. 본 논문에서는 상용 이미지 프로세서 기반 열화상 이미지 처리 모듈을 제안한다. 기존 FPGA 기반 열화상 이미지 처리 방식이 아닌 상용 이미지 프로세서 기반 구조 설계로 함으로써 다양한 영상 입·출력 인터페이스 수신 및 표준 영상 출력 포멧을 지원한다. 따라서 상용 프로세서 기반 열상 처리 모듈을 통한 시스템 개발 시 뛰어난 접근성으로 시스템 구축이 용이하고 다양한 요구사항 적용이 가능함에 따라 개발 기간 및 비용 단축, 다양한 응용에 사용이 가능할 것으로 예상한다.