• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.397-400
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• 2016

In this paper, we propose an efficient algorithm for computing architecture for high-performance Inter Prediction SAD HEVC encoder. HEVC Motion Estimation (ME) of the Inter Prediction is a process for searching for the currently high prediction block PU and the correlation in the interpolated reference picture in order to remove temporal redundancy. ME algorithm uses full search(FS) or fast search algorithm. Full search technique has the guaranteed optimal results but has many disadvantages which include high calculation and operational time due to the motion prediction with respect to all candidate blocks in a given search area. Therefore, this paper proposes a new algorithm which reduces the computational complexity by reusing the SAD operation in full search to reduce the amount of calculation and computational time of the Inter Prediction. The proposed algorithm is applied to an HEVC standard software HM16.12. There was an improved operational time of 61% compared to the traditional full search algorithm, BDBitrate was decreased by 11.81% and BDPSNR increased by about 0.5%.

• The Journal of the Acoustical Society of Korea
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• v.33 no.4
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• pp.262-267
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• 2014

Recently, long pulses are transmitted for target detection in active sonar application. Matched filtering implemented by simple convolution algorithm, requires massive computational power for long replica. The computational loads are reduced significantly by implementing the convolution in the frequency domain with overlap add method, but the performance degrades for specified input/output system delay which constrains the size of FFT function. For performance improvement, the replica could be partitioned into uniform blocks (FDL) by re-using IFFT operations, or variable blocks of increasing length (MC) by using the largest possible blocks to calculate the convolution. In this paper, by combining the strong points of the two methods, we propose a new filter partition structure that allows for further optimization of the previous two methods.

• The KIPS Transactions:PartA
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• v.11A no.3
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• pp.173-180
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• 2004

Quadtree, which 11 a hierarchical data structure, is a very important data structure to represent images. The linear quadtree representation as a way to store a quadtree is efficient to save space compared with other representations. Therefore, it has been widely studied to develop efficient algorithms to execute operations related to quadtrees. The region expansion is an operation to expand images by a given distance and the scaling If an operation to scale images by a given scale factor. In this paper, we present algorithms to perform the region expansion and scaling of images represented by quadtrees, using three-dimensional n${\times}$n${\times}$n processors on RMESH(Reconfigurable MESH). These algorithms have constant time complexities by using efficient basic operations to route the locational codes of quadtree on the hierarchical structure of n${\times}$n${\times}$n RMESH.

• Journal of KIISE:Computer Systems and Theory
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• v.36 no.6
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• pp.521-531
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• 2009

Flash memory has physical characteristics different from hard disk where two costs of a read and write operations differ each other and an overwrite on flash memory is impossible to be done. In order to solve these restrictions with software, storage systems equipped with flash memory deploy FTL(Flash Translation Layer) software. Several FTL algorithms have been suggested so far and most of them prefer sequential write pattern to random write pattern. In this paper, we provide a new technique to efficiently store and maintain the B-tree index on flash memory. The operations like inserts, deletes, updates of keys for the B-tree generate random writes rather than sequential writes on flash memory, leading to inefficiency to the B-tree maintenance. In our technique, we convert random writes generated by the B-tree into sequential writes and then store them to the write-buffer on flash memory. If the buffer is full later, some sequential writes in the buffer will be issued to FTL. Our diverse experimental results show that our technique outperforms the existing ones with respect to the I/O cost of flash memory.

• Journal of KIISE:Computer Systems and Theory
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• v.36 no.4
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• pp.283-290
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• 2009

The rank/select data structure is a basic tool of succinct representations for several data structures such as trees, graphs and text indexes. For a given string sequence, it is used to answer the occurrence of characters up to a certain position. In previous studies, theoretical rank/select data structures were proposed, but they didn't support practical operational time and space. In this paper, we propose a simple solution for implementing rank/select data structures efficiently. According to experiments, our methods without complex encodings achieve nH$_0$ + O(n) bits of theoretical size and perform rank/select operations faster than the original HSS data structure.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.453-456
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• 2003

Spatial database systems achieve filtering steps with MBR(Minimum founding Rectangle) for efficient query processing, and then carry out refinement steps for candidate objects. While most operations require fast execution of filtering, it is necessary to increase the filtering rates and reduce the number of refinement steps in the low computing powered devices. The compact representation method is also needed in the mobile devices with low storage capacity. The paper proposes various approximation methods for efficient spatial operations in the multiplatform environments. This paper also designs a compression technique for MBR, which occupies almost 80% of index data in the two dimensional case. We also analyze the advantages and drawbacks of each method in terms of space utilization, filtering efficiency and speed.

• Journal of Korea Game Society
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• v.12 no.4
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• pp.23-31
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• 2012

The collision processing is one of the essential factors to realize physical principles in the game, and it gives liveliness to the game. The collision processing requires a large amount of operations, and significantly affects the game performance. To address this problem, many studies have been conducted to reduce the operation volume, and the SAP algorithm is being widely used. However, its efficiency is low because it involves repetitive operations. In this study, a distance-based SAP algorithm was proposed to reduce the operation volume for the collision processing and address the problem of the SAP algorithm. A test was conducted to measure the FPS using the simulation program, which was developed with the proposed algorithm. The FPS was 2-33 times higher with the proposed algorithm, which indicated that the efficiency of the collision processing was improved.

• Annual Conference of KIPS
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• 2015.10a
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• pp.1480-1483
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• 2015

최근의 대용량 DEM 데이터는 실시간 렌더링을 하기엔 많은 양의 폴리곤을 필요로 한다. 사진 트리는 이러한 DEM 데이터를 실시간에 렌더링 하기 위해 지형 메쉬를 간략화하는데 널리 사용되는 자료구조이다. 트리구조는 재귀 연산 및 포인터 연산과 같이 GPU 에서 제공하지 않는 기능을 필요로 하기 때문에 일반적으로 CPU 상에서 구현되어 사용된다. GPU 에서 사진 트리 삼각화 기법을 사용하기 위해서 기존의 연구에서는 정점 프리미티브와 스트림 출력 단계를 이용하였다. 하지만 이 방법은 매 프레임 루트 노드부터 리프 노드까지 탐색을 하며 지형 메쉬를 새로 생성 해야하기 때문에 불필요한 연산이 많다. 제안하는 방법은 핑퐁 버퍼를 이용하여 이전 프레임에서 사용한 지형 메쉬를 다음 프레임에서 재활용하여 기존 GPU 기반 사진 트리 삼각화 기법을 가속화한다. 기존 방법이 매 프레임 사각형 패치를 세분화 하면서 지형 메쉬를 생성하는 대신 제안하는 방법은 이전 프레임에서 사용한 메쉬의 각 패치들을 병합하거나 세분화하는 방법을 사용한다. 따라서 본 방법은 GPU 기반 사진 트리 삼각화의 재귀 호출을 제거하여 연산량을 줄이고 매 프레임 CPU-GPU 간의 데이터 전송량도 효율적으로 줄여 기존의 방법을 효율적으로 가속화 한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.30-36
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• 2010

In recent memories, repair is an unavoidable method to maintain its yield and quality. Although many word oriented memories as well as embedded memories in system-on-chip (SOC) consists of multiple local memory blocks with a global spare architecture, most of previous studies on built-in redundancy analysis (BIRA) algorithms have focused on single memory block with a local spare architecture. In this paper, a new BIRA algorithm for multiple blocks with a global spare architecture is proposed. The proposed BIRA is basd on CRESTA which is able to achieve optimal repair rate with almost zero analysis time. In the proposed BIRA, all repair solutions for local memory blocks are analyzed by local analyzers which belong to each local memory block and then compared sequentially and judged whether each solution can meet the limitation of the global spare architecture or not. Experimental results show that the proposed BIRA achieves much faster analysis speed compared to previous BIRAs with an optimal repair rate.

• Journal of Korea Spatial Information System Society
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• v.4 no.1 s.7
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• pp.39-46
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• 2002

In distributed spatial database systems, users nay issue a query that joins two relations stored at different sites. The sheer volume and complexity of spatial data bring out expensive CPU and I/O costs during the spatial join processing. This paper shows a new spatial join method which joins two spatial relation in a parallel way. Firstly, the initial join operation is divided into two distinct ones by partitioning one of two participating relations based on the region. This two join operations are assigned to each sites and executed simultaneously. Finally, each intermediate result sets from the two join operations are merged to an ultimate result set. This method reduces the number of spatial objects participating in the spatial operations. It also reduces the scope and the number of scanning spatial indices. And it does not materialize the temporary results by implementing the join algebra operators using the iterator. The performance test shows that this join method can lead to efficient use in terms of buffer and disk by narrowing down the joining region and decreasing the number of spatial objects.