• Title/Summary/Keyword: 연산법칙

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A Homomorphism on Orthoimplication Algebras for Quantum Logic (양자논리를 위한 직교함의 대수에서의 준동형사상)

  • Yon, Yong-Ho
    • Journal of Convergence for Information Technology
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    • v.7 no.3
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    • pp.65-71
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    • 2017
  • The quantum logic was introduced by G. Birkhoff and 1. von Neumann in order to study projections of a Hilbert space for a formulation of quantum mechanics, and Husimi proposed orthomodular law and orthomodular lattices to complement the quantum logic. Abott introduced orthoimplication algebras and its properties to investigate an implication of orthomodular lattice. The commuting relation is an important property on orthomodular lattice which is related with the distributive law and the modular law, etc. In this paper, we define a binary operation on orthoimplication algebra and the greatest lower bound by using this operation and research some properties of this operation. Also we define a homomorphism and characterize the commuting relation of orthoimplication algebra by the homomorphism.

Performance Analysis for Fine-Grained SW Offloading in Intelligent Memory System (Intelligent한 메모리 시스템에서의 Fine-Grained SW Offloading을 위한 성능 분석)

  • Heo, Ingoo;Kim, Yongjoo;Lee, Jinyong;Lee, Jihoon;Lee, Jongwon;Paek, Yunheung
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.04a
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    • pp.29-32
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    • 2012
  • 전통적으로 컴퓨터의 성능은 중앙 연산 장치 (CPU)의 성능에 따라 좌지우지 되어 왔다. 하지만 CPU의 성능이 지속적인 발전을 거듭하여 무어의 법칙을 비교적 충실히 따라가고 있는 반면, 메모리의 성능은 근래 들어 더디게 발전되는 형국이다. 때문에, CPU와 메모리 간의 성능격차로 인해 메모리의 낮은 성능이 전체 시스템의 성능을 저하시키는 "Memory Wall Problem"은 점점 큰 문제로 대두되고 있다. 이러한 문제를 해결하기 위해 많은 연구에서 메모리 자체의 성능을 발전시키는 것은 물론 메모리 내부에 연산 처리 능력을 추가하여 시스템 전체의 성능을 향상 시키는 시도들을 해왔다. 이 논문에서는 이러한 Intelligent한 메모리 시스템에서의 SW Off-loading을 위한 성능 분석을 다룬다. 이전의 연구들이 주로 큰 단위의 Off-load를 다뤘던 것에 비해 이 논문에서는 작은 단위의 Off-load, 더 정확히는 어셈블리 수준의 Off-load의 효과에 대해 분석한다. 또한 현재의 어셈블리 수준의 Off-load의 한계를 지적하고 이를 극복하기 위한 루프 레벨 Off-load, 새로운 Technology와 아키텍쳐에 대해서도 소개한다.

An Efficient Hardware Implementation of 257-bit Point Scalar Multiplication for Binary Edwards Curves Cryptography (이진 에드워즈 곡선 공개키 암호를 위한 257-비트 점 스칼라 곱셈의 효율적인 하드웨어 구현)

  • Kim, Min-Ju;Jeong, Young-su;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.05a
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    • pp.246-248
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    • 2022
  • Binary Edwards curves (BEdC), a new form of elliptic curves proposed by Bernstein, satisfy the complete addition law without exceptions. This paper describes an efficient hardware implementation of point scalar multiplication on BEdC using projective coordinates. Modified Montgomery ladder algorithm was adopted for point scalar multiplication, and binary field arithmetic operations were implemented using 257-bit binary adder, 257-bit binary squarer, and 32-bit binary multiplier. The hardware operation of the BEdC crypto-core was verified using Zynq UltraScale+ MPSoC device. It takes 521,535 clock cycles to compute point scalar multiplication.

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Design of Multipliers Optimized for CNN Inference Accelerators (CNN 추론 연산 가속기를 위한 곱셈기 최적화 설계)

  • Lee, Jae-Woo;Lee, Jaesung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.10
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    • pp.1403-1408
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    • 2021
  • Recently, FPGA-based AI processors are being studied actively. Deep convolutional neural networks (CNN) are basic computational structures performed by AI processors and require a very large amount of multiplication. Considering that the multiplication coefficients used in CNN inference operation are all constants and that an FPGA is easy to design a multiplier tailored to a specific coefficient, this paper proposes a methodology to optimize the multiplier. The method utilizes 2's complement and distributive law to minimize the number of bits with a value of 1 in a multiplication coefficient, and thereby reduces the number of required stacked adders. As a result of applying this method to the actual example of implementing CNN in FPGA, the logic usage is reduced by up to 30.2% and the propagation delay is also reduced by up to 22%. Even when implemented with an ASIC chip, the hardware area is reduced by up to 35% and the delay is reduced by up to 19.2%.

Study on Statecharts-based Progressive Behavior LOD Model for Virtual Objects (가상 객체를 위한 스테이트챠트 기반의 점진적인 행위 LOD 모델 연구)

  • Seo, Jin-Seok;Youn, Joo-Sang
    • Journal of Digital Contents Society
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    • v.12 no.2
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    • pp.185-194
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    • 2011
  • This paper introduces a Statecharts-based progressive behavior LOD model for computer games and virtual reality systems. In order to use computing resources efficiently and generate an LOD model having arbitrary complexity, we defined a progressive behavior LOD model which including a Statecharts-based specification process, refinement operations, a switching policy, and an LOD selection policy. Additionally, in order to show the possibility of the proposed approach, we demonstrate an example of progressive LOD models by illustrating a step-by-step design of a virtual vehicle.

A Comparison of DC-DC Buck Converter Controller (DC-DC 벅 컨버터 제어기 비교)

  • Kang, Min Gu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.281-285
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    • 2013
  • Transfer function of Buk DC-DC converter is derived using Laplace transformed LC filter. Using root locus and simulation waveform, this paper shows that Type2 controller proposed in reference has poor performance. Using root locus PI controller has designed. Using operational amp, PI controller is realized. Properly operated Type2 controller is proposed and proved using simulation result.

Mathematical Rhymes in Oriental Mathematics and Their Didactical Implications (동양 수학에서의 구결 및 그 교수학적 함의)

  • Chang, Hye-Won
    • Journal for History of Mathematics
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    • v.19 no.4
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    • pp.13-30
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    • 2006
  • The purpose of this study is to investigate the meaning and roles of rhymes in oriental mathematics. To do this, we consider the rhymes in traditional chinese, korean, indian, arabian mathematical books and the mathematical knowledge which they implicate. And we discuss the reasons for which they were often used and the roles which they played. In addition, we suggest how to use them in teaching mathematics.

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A Study on Approximation Method of Linear-Time-Varying System Using Wavelet (웨이브렛을 이용한 선형 시변 시스템의 근사화기법에 관한 연구)

  • 이영석;김동옥;서보혁
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.35T no.1
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    • pp.33-39
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    • 1998
  • This paper discusses approximation modelling of discrete-time linear time-varying system(LTVS). The wavelet transform is considered as a tool for representing and approximating a LTVS. The joint time-frequency properties of wave analysis are appropriate for describing the LTVS. Simulation results is included to illustrate the potential application of the technique.

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Exploring the Principle of Computation between Two-Digit Number and One-Digit Number: A Case Study of Using Cuisenaire Rods and Array Models ((두 자리 수)×(한 자리 수)의 계산 원리 탐구 - 퀴즈네어 막대와 배열 모델을 활용한 수업 사례 연구 -)

  • Kim, JeongWon;Pang, JeongSuk
    • Journal of Educational Research in Mathematics
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    • v.27 no.2
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    • pp.249-267
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    • 2017
  • The unit of multiplication in the mathematics textbook for third graders deals with two-digit number multiplied by one-digit number. Students tend to perform multiplication without necessarily understanding the principle behind the calculation. Against this background, we designed the unit in a way for students to explore the principle of multiplication with cuisenaire rods and array models. The results of this study showed that most students were able to represent the process of multiplication with both cuisenaire rods and array models and to connect such a process with multiplicative expressions. More importantly, the associative property of multiplication and the distributive property of multiplication over addition were meaningfully used in the process of writing expressions. To be sure, some students at first had difficulties in representing the process of multiplication but overcame such difficulties through the whole-class discussion. This study is expected to suggest implications for how to teach multiplication on the basis of the properties of the operation with appropriate instructional tools.

Scattered Light Representation in Accordance with the Material Using Scatterer Template in Volume Rendering (볼륨 렌더링에서 산란자 템플릿을 이용한 재질별 산란광 표현)

  • Lee, Byeong-Joon;Kwon, Koojoo;Shin, Byeong-Seok
    • KIPS Transactions on Software and Data Engineering
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    • v.5 no.12
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    • pp.677-684
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    • 2016
  • For realistic rendering volume to calculate the light effects as well as the shade is essential. In order to produce the high quality of the resulting image, it is necessary to represent a global illumination, and it should be considered an indirect effect of the direct impact and scattering of light. It requires a lot of resources in order to perform this operation and, in particular, is very expensive when large amounts of data to be rendered as a volume data is consumed. In this paper, we generate a scatterer template according to the physical laws for each material. Considering that each object having material property stores photons of the template based on the Lambert illumination model. When the volume rendering in this paper, using the photon is stored in the template, based on the voxel to be sampled within the examination volume occluded, and it represents the global illumination of the scattering. Because the materials produced by the template requires a less resource only if comprised of a complex material, a simple operation can be expressed within the scattering volume at a low cost through.