• Journal of the Institute of Convergence Signal Processing
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• v.14 no.4
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• pp.249-254
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• 2013

A fast multiplier and ADC are essential to process the analog signals in real time. The double-base number system(DBNS) is known as an efficient method for this purpose. The DBNS uses the numbers 2 and 3 as the base numbers simultaneously. The system has an advantage of fast multiplication, less chip area, and low power consumption compared to the binary multiplier. However, the inherent errors of the log number's intrinsic tolerance in DBNS are accumulated in a FIR digital filter, so the signal-to-noise ratio(SNR) has a tendency to be degraded. In this paper, the nonlinear encoder of ADC is designed to compensate the accumulated errors of DBNS by analysing the error distributions of various filter coefficients. The new ADC does not sacrifice its own advantages because the encoder circuits are modified only. The experiments were done with an FIR filters those were designed to have -70dB of SNR in stop band. The proposed nonlinear ADC encoder could drop the SNR to -45dB in stop band, in contrast to -35dB with the linear encoder.

• Journal of Korea Multimedia Society
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• v.12 no.11
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• pp.1629-1639
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• 2009

This paper describes the environmental monitoring system for supporting comfortable subways based on USN. Our development system includes the sensor field based on integrated sensor, monitoring system for supporting the local and remote monitoring and middle-ware performs the collecting, analyzing, and storing the data. In this paper, we installed the temperature, humidity, micro-dust sensor and water-level sensor for supporting the rail-roads and make up the integrated sensor enables to reuse the analog device from 4~20mA output with connection of wireless sensor device. Middleware includes the modules of collecting, analysis, and storing the data and monitoring system supports the local for administrator and remote monitoring for citizen services based on web. The middleware and monitoring in this paper is comprised of some components can reuse and support the change of application and sensors. Our development system supports the mobility of sensor devices and distributes system. Data collection and management function supported by middleware will use assessment.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.799-804
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• 2012

To converter time information to digital information Time-to-Digital Converter(TDC) is designed by using analog delay elements. To obtain the temperature stable characteristics the circuit is designed and the operation of the designed circuit is confirmed by HSPICE. The characteristics variation of the designed delay element with temperature is from -0.18% to 0.126% compared to room temperature characteristics when the temperature is varied from $-20^{\circ}C$ tp $70^{\circ}C$. Time difference is from -0.18% to 0.12% compared to room temperature characteristic when the temperature is varied from $-20^{\circ}C$ tp $70^{\circ}C$. The time difference is simulated when the digital output is 15. However the time difference is from -1.09% to 1.28% in the TDC using temperature non-stable analog delay elements.

• Journal of Energy Engineering
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• v.19 no.2
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• pp.128-135
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• 2010

This paper introduces step by step procedures for the fabrication and operation of an embedded solar tracker. The system presented consists of application software, compactRIO, C-series interface module, analogue input module, step drive, step motor, feedback devices and other accessories to support its functional stability. CompactRIO that has a real-tim processor allows the solar tracker to be a stand-alone real time system which operates automatically without any external control. An astronomical method and an optical method were used for a high-precision solar tracker. CdS sensors are used to constantly generate feedback signals to the controller, which allow a solar tracker to track the sun even under adverse conditions. The database of solar position and sunrise and sunset time was compared with those of those of the Astronomical Applications Department of the U.S. Naval Observatory. The results presented here clearly demonstrate the high-accuracy of the present system in solar tracking, which are applicable to many existing solar systems.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.35-42
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• 2004

A CMOS folding ADC with transistor differential pair folding circuit for low power consumption and high speed operation is presented in this paper. This paper explains the theory of transistor differential pair folding technique and many advantages compared with conventional folding and interpolation circuits. A ADC based on transistor differential pair folding circuit uses 16 fine comparators and 32 interpolation resistors. So it is possible to achieve low power consumption, high speed operation and small chip size. Design technology is based on fully standard 0.25${\mu}{\textrm}{m}$ double poly 2 metal n-well CMOS process. A power consumption is 45mW at 2.5V applied voltage and 250MHz sampling frequency. The INL and DNL are within $\pm$0.15LSB and $\pm$0.15LSB respectively. The SNDR is approximately 50dB at 10MHz input frequency.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.2
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• pp.22-27
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• 2009

In this paper, an automatic functional inspection system EVT (Emulated Vision Tester) for LCD drive module PCB has been proposed and implemented. Typical automatic inspection system such as probing methods and vision-based systems are widely known and used, however, there exist undetectable defects due to critical timing factors which they may miss to catch from LCD equipments. Especially typical vision-based systems have inconsistency on acquisition of images so that distinction between gray scales can be difficult which results in low level of performance and reliability on the inspection results. The proposed EVT system is pure hardware solution. It directly compares pattern signals from a pattern generator to output signals from LCD drive module. It also inspects variety of analog signals such as voltage, resistance, wave forms and so forth. The EVT system not only shows high performance in terms of reliability and processing speed but reduces costs on inspection and maintenance. Also, full automation of entire production line can be realized when EVT is applied in in-line inspection processes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.4
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• pp.103-109
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• 2007

This paper presents behavioral models using SIMULINK and Verilog-a for a PLL based fractional-N frequency synthesizer. By adopting a top-down approach along with the traditional bottom-up transistor level design in parallel, the design time is greatly shortened, and a co-verification method for both the digital and the analog part is considered. Under this consideration, the SIMULINK modeling reduces simulation time and easily estimates the PLL's performance on the top level. Verilog-a is able to verify the feasibility of each blocks at first hand because it is compatible with transister level circuits. Then, an efficient way of the design is presented by comparing the results of both models.

• Journal of Korean Society for Geospatial Information Science
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• v.12 no.3 s.30
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• pp.91-97
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• 2004

As for the former analogue method of photogrammetry, We have obtained final digital drawing by creating the stereo model from overlapped images through orientation process using plotting instrument and processing restitution procedure. However, digital photogrammetry batch processes such using small computer system thus We make an attempt automatization of the procedures. And without the production of stereo model, We could obtain 3D digital data through analysis method. Therefore, an objective of this study was to implement a surveying system that could 3D surveying positions using the digital image to reduce limitations of control point surveying and photographing conditions more efficiently to produce digital drawing. By the result, photogrammetry can practice and make out digital drawing to a computer by digital camera of a comparative low-cost. Small scale area can become practical use to drawing production etc. for facilities management because area can make out digital drawing economically than general surveying.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.2
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• pp.89-98
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• 2004

In this paper, we implement a digital holographic security card system that combines digital holographic memory using random phase encoded reference beams with electrical biometrics. Digitally encoded data including a document, a picture of face, and a fingerprint are recorded by multiplexing of holographic memory. A random phase mask encoding reference beams are used as a decoded key to protect illegal counterfeit. As a result, we can achieve a raw BER of 3.6${\times}$10-4 and shift selectivity of 4${\mu}{\textrm}{m}$ using the 2D random phase mask. Also, we develop a recording pattern and image processing which are suitable for a low cost reader without a position sensing photo-detector for real time data extraction and remove danger of fraud from unauthorized person by comparing the reconstructed holographic data with the live fingerprint data.

• Journal of the Korean Magnetics Society
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• v.14 no.6
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• pp.232-235
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• 2004

Linear GMR isolator which is profitable for transmitting analog signal was modeled and the output voltage and current in relation to the input current were investigated. GMR isolator modeling was divided into two parts, namely magnetic and electric parts. The flow chart of the modeling was drawn in which the MR curve of the spin valves were incorporated to obtain the electrical voltage output. For magnetic modeling, 3-dimensional model of planar coil was analyzed by FEM method to obtain the magnetic field strength corresponding to the input current. Coil efficiency of the planar coil having magnetic core layer was shown to have about 1.5 times larger than that of the coil without the magnetic core layer. The feedback coil current(output current) corresponding to the input coil current was calculated to be within ${\pm}$0.25 mA of the linear fitting function of I$\_$out/= I$\_$in/-5 mA. Also, the response time and output waveforms were obtained when the coil current was a rectangular waveform. The rise time and fall time was 6 ${\mu}\textrm{s}$, respectively when the slew rate of the op-amp was 0.3 V/${\mu}\textrm{s}$.