• Title/Summary/Keyword: 실행 수준

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The Influence of Reflective Thinking Facilitation Program on Reflection Areas and Levels in Pre-Service Science Teachers' Teaching Practice (예비과학교사의 수업 실행에서 반성적 사고를 촉진하는 프로그램이 반성 분야와 반성 수준에 미치는 영향)

  • Kim, Hyun-Jung;Hong, Hun-Gi;Hong, Jee-Hye
    • Journal of The Korean Association For Science Education
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    • v.33 no.6
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    • pp.1087-1102
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    • 2013
  • The purpose of this study is to find out the influence of reflective thinking facilitation program on reflection areas and its levels that pre-service science teachers present in the class teaching practice during the student-teaching period. Seven pre-service science teachers participated in this study and only four pre-service science teachers among them were additionally trained with the reflective program. Reflections of pre-service science teachers were mostly shown on class management, including attention and motivation, reflection and improvement for teaching activities, and interactions. However, the understanding of the science curricula and their reconstruction, and advance notice about the next class were not mentioned in their reflections. Pre-service science teachers who participated in the additional reflective program have shown more frequent reflections than those who only participated in the traditional student-teaching program. Pre-service science teachers, not trained with the reflective program, mostly showed descriptive reflection. However, those who participated in the reflective program have shown higher levels of reflections such as dialogic as well as the descriptive reflection. Therefore, pre-education program, reflective journal-writings, and science teachers' assessments on class and their feedback seem to improve the frequency and level of reflection for the pre-service science teachers.

The Efficient Edge Detection using Genetic Algorithms and Back-Propagation Network (유전자와 역전파 알고리즘을 이용한 효율적인 윤곽선 추출)

  • Park, Chan-Lan;Lee, Woong-Ki
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.11
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    • pp.3010-3023
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    • 1998
  • GA has a fast convergence speed in searching the one point around optimal value. But it's convergence time increase in searching the region around optimal value because it has no regional searching mechanism. BP has the tendency to converge the local minimum because it has global searching mechanism. To overcome these problems, a method in which a genetic algorithm and a back propagation are applied in turn is proposed in this paper. By using a genetic algorithm, we compute optimal synaptic strength and offset value. And then, these values are fed to the input of the back propagation. This proposed method is superior to each above method in improving the convergence speed.

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Fire Safety Consciousness Indicators Development and National Fire Safety Consciousness Research (소방안전의식 지표개발 및 국민 소방안전의식 조사 연구)

  • Jeong, Mu Heon;Park, In-sun
    • Fire Science and Engineering
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    • v.29 no.4
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    • pp.89-94
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    • 2015
  • The purpose of this study is to investigate national fire safety consciousness (FSC). A FSC survey would help with proper fire safety policy. Indicators to define and measure efficiently the FSC were broken down into five areas: prevention, alarm, evacuation, extinguishing, and damage expansion prevention. The indicators were developed using Parasuraman's method based on domestic and foreign research materials and meetings with experts. FSC was surveyed using the indicators on Gallup Korea. The results of the survey analysis show that evacuation is lowest, followed by extinguishing, alarm, prevention, and damage expansion prevention.

Process Algebraic Approach to Timing Analysis of Superscalar Processor Programs (프로세스 대수에 기반을 둔 수퍼스칼라 프로세서 프로그램의 시간 분석)

  • Yoo, Hee-Jun;Lee, Ki-Huen;Choi, Jin-Young
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.2
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    • pp.200-208
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    • 2000
  • Multi-ports register could shared several instructions at the same time in read operation. We address a formal methods for describing timing analysis and resource restriction in pipeline super scalar process that having multi-Port registers. First, we specify in-order pipeline instructions, and then, extend timing analysis in out-of-order super-scalar. In this case, we find instruction pairs in any cycle which can execute same time, We use ACSR(Algebra of Communicating Shared Resources), a branch of formal methods based on process algebra, for instruction specification and modelling.

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A Development Method of User Interface Using a Structural Description Schema in an Expert System (구조적 기술에 의한 전문가 시스템의 사용자 인터페이스 개발 방법)

  • 김상길;김성훈;박충식;김재희
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.1
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    • pp.161-170
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    • 1995
  • In this paper, we define schematic User Interface Task(SUIT) as a scheme which is a conceptual unit to specify the dialogue between man and machine. Using a set of SUITs, the user interface can be described separately from domain applications and can be realized through SUIT Manager(SUITMAN), an execution module devised to interprete and process the descriptions of SUITs. SUIT makes it possible to describe conceptual behaviors performed on the interactions of user interface in early stages of expert system development. SUITMAN analyzes the specification described in SUITs and automatically implements the user interface by using the functions in MOTIF library of X-Window system. By an example of SUIT and SUITMAN to the user interface, we applied them into an expert system, 'Circuit Provisioning Expert System'.

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Design and Simulation of ARM Processor using VHDL (VHDL을 이용한 ARM 프로세서의 설계 및 모의실행)

  • Lee, Jongbok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.5
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    • pp.229-235
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    • 2018
  • As of in the year of 2016, 40 million ARM processors are being shipped everyday and more than 86 billion ARM processors are mounted in mobile communications, consumer electronics, enterprises, and embedded systems. Nationally, we are capable of designing high-end memory semiconductors, but not in processors, resulting in unbalance. Generally, highly expensive software programs are necessary for designing processors which makes it difficult to set up proper environments. However, ModelSim simulator provided by Altera is free and everybody can use it. In this paper, the VHDL language which is widely used in Europe, universities, and research centers around the world for the ASIC design is selected for designing 32-bit ARM processor and simulated by ModelSim. As a result, 37 instructions of ARMv4 has been successfully executed.

A study on the stages of concern, level of use, innovation configurations and the analysis of their relationship to each other shown by elementary teachers regarding storytelling-based math education based on CBAM (CBAM(Concerns-Based Adoption Model)에 기초한 스토리텔링 수학교육에 대한 초등교사의 관심도, 실행 수준, 실행 형태 및 관계 연구)

  • Cha, Min Kyung;Kim, Min Kyeong
    • The Mathematical Education
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    • v.55 no.4
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    • pp.417-445
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    • 2016
  • The purpose of this research is to discover and analyze the stages of concern, level of use, innovation configurations and the analysis of their relationship to each other of storytelling-based math education among elementary teachers based on the concerns-based adoption model (CBAM). And then the researcher derives support strategies for the education by empirically examining at which levels and how actual elementary teachers perceive storytelling-based math education and also how they adopt it. In addition, the researcher lays the purpose of this study on seeking proper supporting strategies for helping elementary teachers implement storytelling-based math education and providing basic material for teaching activities by examining the correlation between stages of concern, levels of use and the innovation configuration, and grasping the relation between teachers concern and their educational practice regarding storytelling-based math education.

HTML5_-based Mobile Web Capture Video Learning System (HTML5_기반 모바일 웹 캡쳐 동영상 학습 시스템)

  • Lee, Yean-Ran;Lim, Young-Hwan
    • The Journal of the Korea Contents Association
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    • v.13 no.2
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    • pp.8-18
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    • 2013
  • In this paper, we capture learning while taking a video, play time and time line of the video frame in the form of areas that require re-learning in HTML5 mobile web store. When you select an image frame can display a list of the frame to take advantage of HTML5 Video tag up to 9 capture and save the playing time at the position. Implemented in a manner that runs Effects as compared to learning to run the entire frame capture learning and re-learning frame partial immersion learners matchumhyeong storytelling can be implemented. Interval Iterative Learning in a random order, so learners can level alignment by iterative learning on academic performance can have a positive effect.

A Design and Implementation of WIPI-compatible Platform based on OpenOS (OpenOS 기반 WIPI 호환 플랫폼의 설계 및 구현)

  • Kim Byung-Gook;Choi Byoung-Kyu;Heu Shin
    • Proceedings of the Korean Information Science Society Conference
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    • 2006.06a
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    • pp.379-381
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    • 2006
  • 모바일 표준 플랫폼 WIPI(Wireless Internet Platform for interoperability)는 모바일 단말기에 탑재되어 응용프로그램을 실행할 수 있는 실행환경을 제공하는 국내 모바일 표준 플랫폼이다. 2002년부터 개발이 시작되어 현재 WIPI 2.0 규격을 탑재한 모바일 단말기가 출시된 상황이다. WIPI 2.0 규격은 PC연결 등의 표준 입출력, 폰카메라, 위치알림 기능, 보안통신 등의 서비스까지 규격화하고 있으며, 차기 버전에서는 휴대폰은 물론 휴대인터넷이나 위성 디지털멀티미디어방송(DMB) 단말기 플랫폼으로의 확장도 모색되는 등 발전가능성이 크다. 그러나 WIPI가 고려되지 않고 설계된 현재의 운영체제상에서 구현된 표준 플랫폼은 설계상 제한이 있으며, 미들웨어의 성격이 강하기 때문에 특정하드웨어와 운영체제에서의 WIPI 지원여부에 따라 응용 분야에 제약이 가해진다. 본 논문에서는 모바일 디바이스를 위한 연구개발을 목적으로 개발된 오픈소스기반 운영체제인 OpenOS의 커널수준에서 WIPI 표준 플랫폼의 HAL(Handset Adaptation Layer)과 WIPI-C 필수 API를 구현하여 성능의 개선과 표준 플랫폼을 위한 운영체제로의 발전 및 활용 가능성을 제시한다.

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The Study for Performance Analysis of Concurrency Control using Deferred Blocking (지연된 블록킹 방법을 사용한 동시성 제어 기법의 성능 분석에 관한 연구)

  • 남태희;박재운;위승민
    • KSCI Review
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    • v.1 no.2
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    • pp.95-107
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    • 1995
  • The concurrency control can be critical to the performance of transaction processing systems. Conventional locking takes the blocking phenomenon, where waiting transactions continue to hold locks and block other transactions from progressing. The proposed scheme reduces the blocking probability by deferring the blocking behavior of transactions to the later stages of their execution. The transaction execution can be divided into a nonblocking phase where transactions wait for locks but do not block other transactions and a blocking phase as in conventional locking. However data accessed during the nonblocking phase can lead to transaction abort. By properly balancing the blocking and abort effects, the proposed scheme can lead to better performance than either the conventional locking or the optimistic concurrency control(OCC) scheme at all data and resource contention levels.

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