• Title/Summary/Keyword: 스파이럴 인덕터

Search Result 15, Processing Time 0.028 seconds

Miniaturized DBS Downconverter MMIC Showing a Low Noise and Low Power Dissipation Characteristic (저잡음ㆍ저소비전력 특성을 가지는 위성방송 수신용 초소형 다운컨버터 MMIC)

  • Yun, Young
    • Journal of Navigation and Port Research
    • /
    • v.27 no.4
    • /
    • pp.443-447
    • /
    • 2003
  • In this work. using 0.2 GaAs modulation doped FET(MODFET), a high performance DBS downconverter MMIC was developed for direct broadcasting satellite (DBS) application. Without LNA, the downconverter MMIC showed a very low noise of 4.8 dB, which is lower by 3 dB than conventional ones. A low LO power of -10 dBm was required for the normal DBS operation of the downconverter MMIC. which reduced the power consumption via a removal of LO amplifier on MMIC. It required only a low power consumption of 175 mW, which is lower than 70 percent of conventional ones. The LO leakage power at IF output was suppressed to a lower level than 30 dBm, which removes a bulky LO rejection filter on a board. The fabricated chip, which include a mixer, If amplifiers. LO rejection filter, and active balun, exhibited a small size of $0.84{\times}0.9\textrm{mm}^2$.

A 2 GHz Compact Analog Phase Shifter with a Linear Phase-Tune Characteristic (2 GHz 선형 위상 천이 특성을 갖는 소형 아날로그 위상천이기)

  • Oh, Hyun-Seok;Choi, Jae-Hong;Jeong, Hae-Chang;Heo, Yun-Seong;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.22 no.1
    • /
    • pp.114-124
    • /
    • 2011
  • In this paper, we present a 2 GHz compact analog phase shifter with linear phase-tune characteristic. The compact phase shifter was designed base on a lumped all pass network and implemented using a ceramic substrate fabricated with thin-film technique. For a linear phase-tune characteristic, a capacitance of the varactor diode for a tuning voltage was linearized by connecting series capacitor and subsequently produced an almost linear capacitance change. The inductor and bias circuit in the all pass network was implemented using a spiral inductors for small size, which results in the size reduction to $4\;mm{\times}4\;mm$. In order to measure the phase shifter using the probe station, two CPW pads are included at the input and output. The fabricated phase shifter showed an insertion loss of about 4.2~4.7 dB at 2 GHz band and a total $79^{\circ}$ phase change for DC control voltage from 0 to 5 V, and showed linear phase-tune characteristic as expected in the design.

A Design of 40GHz CMOS VCO (Voltage Controlled Oscillator) for High Speed Communication System (고속 통신 시스템을 위한 40GHz CMOS 전압 제어 발진기의 설계)

  • Lee, Jongsuk;Moon, Yong
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.51 no.3
    • /
    • pp.55-60
    • /
    • 2014
  • For an high speed communication, a 40GHz VCO was implemented using a 0.11um standard CMOS technology. The mm-wave VCO was designed by a LC type using a spiral inductor, and a simplified architecture with buffers and a smart biasing technique were used to get a high performance. The frequency range of the proposed VCO is 34~40GHz which is suitable for mm-Wave communication system. It has an output power of -16dBm and 16% tuning range. And the phase noise is -100.33dBc/Hz at 1MHz offset at 38GHz fundamental frequency. The total power consumption of VCO including PADs is 16.8mW with 1.2V supply voltage. The VCO achieves the FOMT of -183.8dBc/Hz which is better than previous VOCs.

Design and Fabrication of Multilayer Diplexer for Dual Band GSM/DCS Applications using Lumped Elements (집중 소자를 이용한 이중 대역 GSM/DCS용 적층형 다이플렉서의 설계 및 제작)

  • 심성훈;강종윤;최지원;윤영중;김현재;윤석진
    • Journal of the Korean Ceramic Society
    • /
    • v.40 no.11
    • /
    • pp.1090-1095
    • /
    • 2003
  • In this paper, the modeling and design of high-Q multilayer passives and multilayer diplexer for GSM/DCS applications designed and fabricated using these passives have been investigated.. To miniaturize the system, configurations of inductor and capacitor have involved a square spiral structure and a vertically-interdigitated capacitor similar to 3D interdigital structure, respectively. Multilayer diplexers for GSM/DCS applications were designed and fabricated to apply high-Q multilayer passives to practical systems, which were designed by the proposed structural and equivalent circuit model. LPF for GSM band had the passband insertion loss of less than 0.55 dB, the return loss of more than 12 dB, and the isolation level of more than 26 dB by locating attenuation pole at 1800 MHz. HPF for DCS band had the passband insertion loss of less than 0.82 dB, the return loss of more than 11 dB, and the isolation level of more than 38 dB by locating attenuation pole at 930 MHz.

Implementation of Diplexer using Heterogeneous Dielectric Multilayer Organic Substrate (이종 유전율의 다층 유기물 기판을 이용한 diplexer 구현)

  • Lee, Jae-Yong;Moon, Byung-Moo;Park, Se-Hoon;Yoo, Chan-Sei;Lee, Woo-Sung;Kim, Jun-Chul;Kang, Nam-Kee;Park, Jong-Chul
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2007.06a
    • /
    • pp.36-36
    • /
    • 2007
  • 본 논문에서는 SoP-L(System on Package-Laminates) 기술을 이용하여 이종의 유전율을 가진 유기물 적층 기반의 수동소자를 이용한 GSM/DCS 대역 분리용 diplexer를 설계, 제작하였고 그 특성을 고찰하였다. SoP-L 기술은 LTCC기술과 같은 타 SoP 기술과 비교해서 이종의 물질을 접합하는데 용이하고 공정비용이 저렴하다. 이러한 장점을 이용하여 캐때시터는 유전율 40의 고유전율 재료를 사이에 두고 구성하였고, 인덕터 부문에는 유전율 4률 적용, 정방혈 스파이럴 구조로 두 개 층으로 구성하여 소형화를 이룰 수 있었다. 제작 시에 구리와 유기물을 적층, patterning 하였고, 수직 via hole 을 형성하고 구리의 무전해, 전해 도금 과정을 거쳐 각 소자를 연결하였다. 이러한 과정을 거쳐 제작된 diplexer의 GSM 저역 통과 필터는 0.52 dB이하의 삽입손실과 20 dB 이상의 반사손실을 가지고 DCS 통과 대역 부근에 notch 가 존재하도록 설계함으로써 DCS 통과 대역에서 17 dB 이상의 저지특성을 나타내었다. DCS 고역 통과 필터는 1.2 dB 이하의 삽입손실과 16 dB 이상의 반사손실을 가지며 GSM 통과 대역 부근에 notch를 가지도록 설계하여 GSM 통과대역에서 32 dB 이상의 저지특성을 나타내었다.

  • PDF