• Journal of Internet Computing and Services
• /
• v.1 no.2
• /
• pp.11-18
• /
• 2000

In this paper we present a new extensible model based upon the concept of subtransactions in real-time transaction systems. The nested transaction model originally proposed by J. Moss is extended for real-time uniprocessor transaction systems by adding explicit timing constraints. Based upon the model, an integrated concurrency control and scheduling algorithm is developed, that not only guarantees timing constraints of a set of real-time transactions but also maintains consistency of the database. The algorithm is based on the priority ceiling protocol of Sha et al. We prove that the Real-Time Nested Priority Ceiling Protocol prevents unbounded blocking and deadlock, and maintains the serializability of a set of real-time transactions. We use the upper bound on the duration that a transaction can be blocked to show that it is possible to analyze the schedulability of a transaction set using rate-monotonic priority assignment. This work is viewed as a step toward multiprocessor and distributed real-time nested transaction systems. Also, it is possible to be extended to include the real-time multimedia transactions in the emerging web-based database application areas.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.15 no.6
• /
• pp.3851-3857
• /
• 2014

Shippers' requests of freight trains vary with time, but generating an additional schedule of freight trains is not easy due to many considerations, such as the line capacity, operation rules, and conflicts with existing trains. On the other hand, an additional freight train schedule has been continuously requested and manually processed by domestic train operation companies using empirical method, which is time consuming. This paper proposes a model to determine the additional freight train schedule that assesses the feasibility of the added freight trains, and generates as many additional schedules as possible, while minimizing the delay of the existing schedules. The problem is presented using time-space network, modeled as multi-commodity flow problem, and solved using the column generation method. Three levels of experiment were conducted to show validity of the proposed model in the computation time.

• Journal of KIISE:Computing Practices and Letters
• /
• v.5 no.6
• /
• pp.738-747
• /
• 1999

본 논문에서는 분산 실시간 시스템의 특징인 분산 처리 과정의 신뢰성을 지원하기 위한 동적 트랜잭션 처리 구조를 연구하였다. 실시간 분산 처리 환경에서 동적으로 발생하는 실시간 분산 트랜잭션 처리를 위하여 트랜잭션 내에 필수적인 3가지 언어적 특성들을 제시하였다. 첫째는 트랜잭션 내에 실시간 시스템의 가장 중요한 특징인 시간적인 제약 조건들을 정의 할 수 있는 방안을 제시하고, 둘째는 비동기적인 처리 성격을 지닌 실시간 특성을 고려한 비동기적 트랜잭션 처리 방법을 제시한다. 또한, 분산 처리 과정에서 발생되는 예외 사항들을 처리하기 위하여 긴급성을 고려한 다중레벨 우선순위 스케줄링 (Multi-Level Priotiry Scheduling)이라 부르는 트랜잭션 스케줄링 방안을 제시한다. 그리고, 제시한 실시간 분산 트랜잭션 처리 구조의 타당성 및 가능성을 입증하기 위한 실시간 트랜잭션 처리 과정을 시물레이션을 통하여 제시한 언어적 특성에 대한 고려 사항들을 보여준다.Abstract We propose a dynamic transaction processing model that supports a reliability for distributed real-time processing. For the dynamic processing in distributed real-time transaction systems, we suggest three features that are defined in programming language. First, we propose a specification model to explicitly define the time constraints, needs in real-time distributed processing. Second, we describe an asynchronous transaction processing mechanism based on the real-time characteristics. So, we suggest three communication primitives to support asynchronous transaction processing. Lastly, a scheduling policy based on urgent transaction is suggested to manage the exception occurred during the distributed processing. This scheduling policy is called multi-level priotiry scheduling (MPLS). Based on three features and scheduling policy, we describe a direction to manage a dynamic transaction processing in distributed real-time systems.

• Journal of KIISE:Computer Systems and Theory
• /
• v.33 no.9
• /
• pp.592-607
• /
• 2006

This paper proposes a technique to select processors and hardware IPs and to map the tasks into the selected processing elements, aming to achieve high performance with minimal system cost when multitask applications with real-time constraints are run on a multicore SoC. Such technique is called to 'Hardware-Software Cosynthesis Technique'. A cosynthesis technique was already presented in our early work [1] where we divide the complex cosynthesis problem into three subproblems and conquer each subproblem separately: selection of appropriate processing components, mapping and scheduling of function blocks to the selected processing component, and schedulability analysis. Despite good features, our previous technique has a serious limitation that a task monopolizes the entire system resource to get the minimum schedule length. But in general we may obtain higher performance in multitask multicore system if independent multiple tasks are running concurrently on different processor cores. In this paper, we present two mapping techniques, task mapping avoidance technique(TMA) and task mapping pinning technique(TMP), which are applicable for general cases with diverse operating policies in a multicore environment. We could obtain significant performance improvement for a multimedia real-time application, multi-channel Digital Video Recorder system and for randomly generated multitask graphs obtained from the related works.

• Journal of the Korean Wood Science and Technology
• /
• v.41 no.6
• /
• pp.535-543
• /
• 2013

The objective of this study was to analyse the residual stress in Larix kaempferi board during and after kiln-drying. The boards were primarily intended for using as laminar of cross laminated timber (CLT). In this study, the equivalence of moisture content by equalizing treatment was proved and reduction of residual stress by conditioning treatment was quantified. Prong test and slice test were carried out to analyse the residual stress in wood during drying. Transverse casehardening was measured immediately after making prong sample. Residual stress of four parts in wood from surface to center was analyzed quantitatively based on elastic deformation after just cutting slices from board. Tensile stress and compressive stress on the surface of board during drying did not exceed 2.2 MPa when boards were dried by kiln-drying schedule of T10-C4 and T12-D5. Because the tensile strength and compressive strength of transverse direction of Larix kaempferi lumber are 2.65 MPa and 4.60 MPa, application of more severe drying schedule can be recommended. Cup and twist were reduced by about 40% by equalizing and conditioning treatments after drying.

• The Transactions of the Korea Information Processing Society
• /
• v.1 no.3
• /
• pp.367-379
• /
• 1994

This paper describes scheduling algorithms of the UNIX operating system and shows an analytical approach to approximate the average conditional response time for a process in the UNIX operating system. The average conditional response time is the average time between the submittal of a process requiring a certain amount of the CPU time and the completion of the process. The process scheduling algorithms in thr UNIX system are based on the priority service disciplines. That is, the behavior of a process is governed by the UNIX process schuduling algorithms that (ⅰ) the time-shared computer usage is obtained by allotting each request a quantum until it completes its required CPU time, (ⅱ) the nonpreemptive switching in system mode and the preemptive switching in user mode are applied to determine the quantum, (ⅲ) the first-come-first-serve discipline is applied within the same priority level, and (ⅳ) after completing an allotted quantum the process is placed at the end of either the runnable queue corresponding to its priority or the disk queue where it sleeps. These process scheduling algorithms create the round-robin effect in user mode. Using the round-robin effect and the preemptive switching, we approximate a process delay in user mode. Using the nonpreemptive switching, we approximate a process delay in system mode. We also consider a process delay due to the disk input and output operations. The average conditional response time is then obtained by approximating the total process delay. The results show an excellent response time for the processes requiring system time at the expense of the processes requiring user time.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.10 no.5
• /
• pp.45-55
• /
• 2010

While Long Term Evolution-Frequency Division Duplexing (LTE-FDD) is regarded as one of the strong candidates for "4G" wireless broadband access in FDD field, LTE-Time Division Duplexing (TDD) is emerging as one possible migration path for WiMAX-TDD in some cases as well as the migration path for Time Division-Synchronous Code Division Multiple Access (TD-SCDMA). In this paper, we analyze the feasibility of dual mode with LTE-TDD in two combinations: dual mode LTE-FDD/TDD and dual mode Worldwide Interoperability for Microwave Access (WiMAX)-TDD/LTE-TDD. Thanks to the commonality in numerology, terminology, and frame structure between LTE-FDD and LTE-TDD, dual mode LTE-FDD/TDD looks feasible in a cost-effective manner. Thanks to the commonality in scheduling algorithm, control mechanism, and supported spectrum bands, it is shown that dual mode WiMAX-TDD/LTE-TDD looks feasible as well. It should be also noted that the commonality in numerology and frame structure is critical for building a chip while the commonality in algorithms and control mechanisms is critical to make it work.

• Aerospace Engineering and Technology
• /
• v.7 no.2
• /
• pp.162-169
• /
• 2008

Dynamic characteristics of a control valve, which plays an important role in thrust control of liquid rocket engines, have been analysed by AMESim simulator modeling. A speed control method has been proposed for the control of the valve equipped with a BLDC motor and the performances of this control method have been proved in making a comparison between the predictions of simulation and experimental results. Moreover, it is shown that a control valve with a second pre-filter is enough stable to the flow disturbances. The speed control method for BLDC motor is more simpler than PI gain scheduling method for the application in complex flow system.

• Proceedings of the Korean Institute Of Construction Engineering and Management
• /
• autumn
• /
• pp.427-431
• /
• 2002

Nowadays in Korea, there has been extreme competition due to market reduction in the domestic construction industry. As a result every company try to change rapidly to secure competitive power, Although it isn't betterment for the way of construction project management then there has many problem such as a delay of the appointed date of delivery and go over the budget. In this study, we suggest an introduction of CCPM which is based on TOC to construction projects.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.28 no.5
• /
• pp.1071-1078
• /
• 2018

Recently, a family of lightweight block ciphers CHAM that has effective performance on resource-constrained devices is proposed. The CHAM uses a stateless-on-the-fly key schedule method which can reduce the key storage areas. Furthermore, the core design of CHAM is based on ARX(Addition, Rotation and XOR) operations which can enhance the computational performance. Nevertheless, we point out that the CHAM algorithm may be vulnerable to the fault injection attack which can reveal 4 round keys and derive the secret key from them. As a simulation result, the proposed fault injection attack can extract the secret key of CHAM-128/128 block cipher using about 24 correct-faulty cipher text pairs.