• Title/Summary/Keyword: 스칼라 3

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Processing of 3-Axial Accelerometer Sensor Data and Its Application (3축 가속도 센서 데이터의 처리와 응용)

  • Kim Nam-Jin;Hong Joo-Hyun;Lee Tae-Soo
    • Proceedings of the Korea Contents Association Conference
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    • 2005.11a
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    • pp.548-551
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    • 2005
  • In this paper, three axial accelerometer was used to develop a small sensor module, which was attached to human body to calculate the acceleration in gravity direction by human motion, when it was positioned in any direction. To measure its wearer's walking or running motion using the sensor module, the acquired sensor data was pre-processed to enable its quantitative analysis. The acquired digital data was transformed to orthogonal coordinate value in three dimension and calculated to be single scalar acceleration data in gravity direction and normalized to be physical unit value.

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Simulation of YUV-Aware Instructions for High-Performance, Low-Power Embedded Video Processors (고성능, 저전력 임베디드 비디오 프로세서를 위한 YUV 인식 명령어의 시뮬레이션)

  • Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of KIISE:Computing Practices and Letters
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    • v.13 no.5
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    • pp.252-259
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    • 2007
  • With the rapid development of multimedia applications and wireless communication networks, consumer demand for video-over-wireless capability on mobile computing systems is growing rapidly. In this regard, this paper introduces YUV-aware instructions that enhance the performance and efficiency in the processing of color image and video. Traditional multimedia extensions (e.g., MMX, SSE, VIS, and AltiVec) depend solely on generic subword parallelism whereas the proposed YUV-aware instructions support parallel operations on two-packed 16-bit YUV (6-bit Y, 5-bits U, V) values in a 32-bit datapath architecture, providing greater concurrency and efficiency for color image and video processing. Moreover, the ability to reduce data format size reduces system cost. Experiment results on a representative dynamically scheduled embedded superscalar processor show that YUV-aware instructions achieve an average speedup of 3.9x over the baseline superscalar performance. This is in contrast to MMX (a representative Intel#s multimedia extension), which achieves a speedup of only 2.1x over the same baseline superscalar processor. In addition, YUV-aware instructions outperform MMX instructions in energy reduction (75.8% reduction with YUV-aware instructions, but only 54.8% reduction with MMX instructions over the baseline).

The Cubically Filtered Gradient Algorithm and Structure for Efficient Adaptive Filter Design (효율적인 적응 필터 설계를 위한 제 3 차 필터화 경사도 알고리즘과 구조)

  • 김해정;이두수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.11
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    • pp.1714-1725
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    • 1993
  • This paper analyzes the properties of such algorithm that corresponds to the nonlinear adaptive algorithm with additional update terms, parameterized by the scalar factors a1, a2, a3 and Presents its structure. The analysis of convergence leads to eigenvalues of the transition matrix for the mean weight vector. Regions in which the algorithm becomes stable are demonstrated. The time constant is derived and the computational complexities of MLMS algorithms are compared with those of the conventional LMS, sign, LFG, and QFG algorithms. The properties of convergence in the mean square are analyzed and the expressions of the mean square recursion and the excess mean square error are derived. The necessary condition for the CFG algorithm to be stable is attained. In the computer simulation applied to the system identification the CFG algorithm has the more computation complexities but the faster convergence speed than LMS, LFG and QFG algorithms.

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Improvement of Luminous Environment by Changing Light Source in Urban Street (도시가로의 광원교체에 의한 조명환경의 개선에 관한 연구)

  • Kim, Hyun-Jeong;Yu, In-Hye;Kim, Jeong-Tai
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2005.05a
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    • pp.24-29
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    • 2005
  • 본 연구는 최근 서울시를 중심으로 진행되고 있는 도시 가로조명의 광원교체에 따른 조명환경 개선효과를 조사 분석하였다. 조사대상은 이미 기존의 나트륨램프를 고효율 메탈할라이드 램프로 교체한 서울시 종로구의 창경궁길로 선정하였다. 평가방법은 조사대상을 중심으로 야간의 교체 전, 후의 조명현황조사 및 물리량을 측정하였으며, 이를 토대로 개선효과를 분석하였다. 분석결과, 광원을 교체한 후 수평면 조도는 약 1.4배, 스칼라 조도는 약 1.3배 증가하였으며, 공간의 평균 휘도값은 $0.06cd/m^2$ 증가하였다. 색온도는 2,399[K]에서 3,632[K]로 증가하여 공간의 느낌이 따뜻한 느낌에서 차가운 느낌으로 변화되었는데, 이는 기존의 평온한 이미지에서 부드러운 이미지로 변화 된 것으로 분석된다. 색도는 주황색에 가까운 노란색에서 엷은 노란색을 띠는 백색으로 변화되었으며, 이는 램프의 연색성에 의하여 사물의 식별성에 대한 가시도가 증가한 것으로 분석된다. 또한, 에너지 절감형 친환경 메탈할라이드 램프의 교체에 의하여 앞으로 연간 에너지 절감효과도 클 것으로 기대된다.

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Image Compression with Edge Directions based on DCT-VQ (DCT-VQ를 기반으로 한 에지의 방향성을 갖는 영상압축)

  • 김진태;김동욱;임한규
    • Journal of Korea Multimedia Society
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    • v.1 no.2
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    • pp.194-203
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    • 1998
  • In this paper, a new DCT-VQ method is proposed which can solve the problems of VQ such as the degradation of edge and enormous calculations. VQ is carried in DCT domain but spatial domain in order to protect the degradation of edge. DCT makes high correlated image data decorrelated and the energy concentrated on a few coefficients. In DCT domain, the DC coefficient is quantized with 8 bits uniform scalar quantizer and the AC coefficients are divided to three regions and coded with vector qiantizer for considering edge components. For the decrease of the calculation and memory, the vectors for three region have small dimension of $1{\times}7$ and use the same codebook. Thus, the proposed method can fully express the edge components by considering AC coefficients in DCT domain and decrease the calculation and memory be reducing the dimension of vectors.

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Anisotropic Version of Mohr-Coulomb Failure Criterion for Transversely Isotropic Rock (횡등방성 암석의 강도해석을 위한 이방성 Mohr-Coulomb 파괴조건식)

  • Lee, Youn-Kyou;Choi, Byung-Hee
    • Tunnel and Underground Space
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    • v.21 no.3
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    • pp.174-180
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    • 2011
  • An anisotropic version of Mohr-Coulomb failure criterion is proposed in order to provide a strength criterion for transversely isotropic rock. The concept of fabric tensor introduced by Pietruszczak & Mroz (2001) is employed to define the friction angle and cohesion as scalar functions of the fabric tensors. The anisotroy in these two strength parameters are calculated in association with the consideration of the relative rotation between the principal stress coordinate and the principal material triad. The critical plane on which the anisotropic function maximized is found by an optimization technique based on the Lagrange multiplier method. To demonstrate the performance of the anisotropic failure criterion, conventional triaxial tests on the samples having various inclinations of weakness plane are simulated and the resulting triaxial strength and dip angle of failure plane are discussed.

A Content Retrieval Method Using Pictures Taken from a Display Robust to Partial Luminance Change (부분 휘도 변화에 강인한 영상 촬영 기반 콘텐츠 검색 방법)

  • Lee, Joo-Young;Kim, Youn-Hee;Nam, Je-Ho
    • Journal of Broadcast Engineering
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    • v.16 no.3
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    • pp.427-438
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    • 2011
  • In this paper, we propose a content retrieval system using pictures taken from a display for more intelligent mobile services. We focus on the search robustness by minimizing the influence of photographing conditions such as changes in the illumination intensity. For an efficient search and precise detection, as well as robustness, we use a two-step comparison method based on indexing features and a binary map based on luminance and chrominance difference with the adjacent blocks. We also evaluate the proposed algorithm by comparing with the existing algorithms, and we show the content retrieval system that we've implemented using the proposed algorithm.

JPEG2000 IP Design and Implementation for SoC Design (SoC를 위한 JPEG2000 IP 설계 및 구현)

  • 정재형;한상균;홍성훈;김영철
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2002.11a
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    • pp.63-68
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    • 2002
  • JPEG2000은 기존의 정지영상압축부호화 방식에 비해 우수한 비트율-왜곡(Rate-Distortion)특성과 향상된 주관적 화질을 제공하며 인터넷, 디지털 영상카메라, 이동단말기, 의학영상 등 다양한 분야에서 적용될 수 있는 새로운 정지영상압축 표준이다. 본 논문에서는 SoC(System on a Chip)설계를 고려한 JPEG2000 인코더의 구조를 제안하고 IP(Intellectual Property)를 설계 및 검증하였다. 구현된 JPEG2000 IP는 DWT(Discrete Wavelet Transform)블록, 스칼라양자화블록, EBCOT(Embedded Block Coding with Optimized Truncation)블록으로 구성되어 있다. IP는 모의실험을 통해 구현 구조에 대한 타당성을 검증하였고, 반도체설계자산연구센터에서 제시한 'RTL Coding Guideline'에 따라 HDL을 설계하였다. 특히, DWT블록은 구현시 많은 연산과 메모리 용량이 필요하므로 영상을 저장할 외부 메모리를 사용하였고, 빠른 곱셈과 덧셈연산을 위한 3단 파이프라인 부스곱셈기(3-state pipeline booth multiplier)와 캐리예측 덧셈기(carry lookahead adder)를 사용하였다. 설계된 JPEG2000 IP들은 삼성 0.35$\mu\textrm{m}$ 라이브러리를 이용하여 Synopsys사 Design Analyzer 틀을 통해 논리 합성하였으며, Xillinx 100만 게이트 FPGA칩에 구현하여 그 동작을 검증하였다. 또한, Hard IP 설계를 위해 Avanti사의 Apollo툴을 이용하여 Layout을 수행하였다.

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Disambiguation of Author Names Using Co-citation (동시인용정보를 이용한 동명이인 저자의 중의성 해소)

  • Kang, In-Su
    • Journal of Information Management
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    • v.42 no.3
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    • pp.167-186
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    • 2011
  • Co-citation means that two or more studies are cited together by a later study. This paper deals with the relationship between co-citation and author disambiguation. Author disambiguation is to cluster same-name author instances into real-world individuals. Co-citation may influence author disambiguation in terms that two or more related research works performed by the same person may be co-cited by some later studies. This article describes automated steps to gather co-citation information from Google scholar, and proposes a new clustering algorithm to effectively integrate co-citation information with other author disambiguation features. Experiments showed that co-citation helps to improve the performance of author disambiguation.

Performance Study of Multicore Digital Signal Processor Architectures (멀티코어 디지털 신호처리 프로세서의 성능 연구)

  • Lee, Jongbok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.13 no.4
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    • pp.171-177
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    • 2013
  • Due to the demand for high speed 3D graphic rendering, video file format conversion, compression, encryption and decryption technologies, the importance of digital signal processor system is growing rapidly. In order to satisfy the real-time constraints, high performance digital signal processor is required. Therefore, as in general purpose computer systems, digital signal processor should be designed as multicore architecture as well. Using UTDSP benchmarks as input, the trace-driven simulation has been performed and analyzed for the 2 to 16-core digital signal processor architectures with the cores from simple RISC to in-order and out-of-order superscalar processors for the various window sizes, extensively.