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Sensitivity of Feedback Channel Delay on Transmit Adaptive Array (적응형 송신 빔 성형을 적용한 CDMA 시스템의 귀환 채널 지연에 따른 성능)

  • 안철용;한진규;김동구
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.6B
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    • pp.579-585
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    • 2002
  • The investigation into the effect of various feedback errors on system performance can help the robust feedback channel design and transmission of exact feedback channel information as well. In this paper, we address the algorithm that determines space combining weight vector maximizing received signal power at mobile on frequency flat fading channel and investigate the performance degradation by feedback channel delay in the FDD/CDMA systems employing transmit beamforming. We observe the effect of feedback channel delay corresponding to the number of transmit antennas and the temporal/spatial correlation of channel. The results show that performance is more sensitive to feedback delay with the larger number of antennas when fadings at transmit antennas are not spatially correlated.

A Design and Implementation of OTU4 Framer for l00G Ethernet (100G 이더넷 수용을 위한 OTU4 프레이머 표준기술 설계 및 구현)

  • Youn, Ji-Wook;Kim, Jong-Ho;Shin, Jong-Yoon;Kim, Kwang-Joon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.12B
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    • pp.1601-1610
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    • 2011
  • This paper discusses standardization activities, requirements and enabling technologies for 100G Ethernet and 100G OTN. The need of 100Gbps transport capacity has been gaining greater interest from service providers and carrier vendors. Moreover, optical transport networks based on OTN/DWDM are changing their properties to apply Ethernet traffic which is dramatically increasing. We realize and experimentally demonstrate OTU4 framer with commercial FPGA. The key features of the realized OTU4 framer are parallel signal processing function, multi-lane distribution function, GMP function and FEC function. The realized OTU4 framer has the large signal processing capacity of 120Gbps, which allows to transport about 120Gbps client signals such as $12{\times}10G$ Ethernet and $3{\times}40G$ Ethernet. The realized OTU4 framer has the advantages to quickly adjust to changing markets and new technologies by using commercial FPGA instead of ASIC.

A study on the amorphous s-i-n photodiode integrated with CMO IC (CMOS IC와 집적 가능한 비정질 p-i-n 광 수신기 제작에 관한 연구)

  • Kwak, Chol-Ho;Yoo, Hoi-Jun;Jang, Jin;Moon, Byoung-Yeon
    • Korean Journal of Optics and Photonics
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    • v.8 no.6
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    • pp.500-505
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    • 1997
  • Experimental amorphous photodiode is fabricated on CMOS IC using a-Si:H p-i-n structure. Amorphous photodiode is scuccessfully integrated on CMOS IC using amorphous Si produced by PECVD system. The PECVD system can deposit a-Si:H at low temperature so that photodiode can be integrated with CMOS IC structure without any process incompatibility. The fabricated amorphous photodiode has a breakdown voltage of below -20 V, a leakage current of about 1 $\mu\textrm{A}$, and turn-on voltage of 0.6~0.8 V. It is demonstrated that the photocurrent of optical signal can be turned on and off by a small voltage and the fabricated amorphous p-i-n photodiode can be used as an optical switch.

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Performance of Network Coding with Best Relay Selection in Fading Channels (페이딩 채널에서 최선 릴레이 선택을 갖는 네트워크 코딩의 성능)

  • Kim, Nam-Soo
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.13 no.4
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    • pp.193-200
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    • 2013
  • Recently, network coding has been actively studied to increase the spectral efficiency of two-way relay wireless channels such as cellular systems as well as broadcasting systems. In this paper, we derive the average transmission capacity and the outage probability of a network coding system, which utilizes two-way data transmission via the best relay rather than multiple relays. Since the data unbalance between the forward and the reverse link in two-way communication systems exists, we include the asymmetric link as well as the symmetric link in the analysis. It is noticed that the space diversity gain increases as the increase of the number of relays. Also we obtain 11.4 dB signal-to-noise ratio (SNR) gain with 9 relays compared to that with single relay in symmetrical link at the given conditions. In asymmetrical links, we denotes that the outage probability is more sensitive to the number of relays rather than data unbalance between the links.

Gratitude Experience of Mothers who cares Child with Chronic Schizophrenia (만성조현병환자 어머니의 감사경험)

  • Hong, Ju-Eun
    • Journal of Digital Convergence
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    • v.18 no.1
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    • pp.199-209
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    • 2020
  • This study was done to explore deeply the essence and meaning of gratitude experience of mothers who cares child with schizophrenia. This study was analysed through the use of the phenomenological method of Giorgi. Data was collected through in-depth interviews, observation, and field records with five motheres who cares child with schizophrenia. Data analysis revealed 18 sub-components, 5 components: 'I'm like fallen seed on barren soil without gratitude', 'gratitude coming into bud like sprout,' 'gratitude grown up into a tree through tolerance', 'gratitude bearing fruit of self-sufficiency and desire', and 'gratitude getting much richer with giving. The results from the study contribute to promoting understanding of the gratitude experience of mothers who cares child with schizophrenia and will be helpful for development of positive family nursing intervention.

Studies on Extrinsic Resistance Extraction Method of PHEMT Using Bias-Dependence of Impedance (바이어스에 따른 임피던스 특성을 이용한 PHEMT의 기생 저항 추출방법에 관한 연구)

  • Park, Duk-Soo;An, Dan;Rhee, Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.2
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    • pp.59-64
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    • 2004
  • In this paper, a Cold PHEMT equivalent circuit was proposed, and it is applied to extract extrinsic resistances. By using the proposed Cold PHEMT equivalent circuit, the variation of impedance with frequency and bias were mainly emphasized. Especially, the convergence of impedance with frequency and the change in impedance with bias were carefully analyzed, which may be used for fast extraction of extrinsic resistances. The proposed extraction method demonstrated improving of small signal model accuracy than conventional extraction method.

TCP Performance improvement over Asymmetric Bandwidth Satellite Network using ACK filtering and Packet scheduling (비대칭 대역폭 위성망에서의 TCP 성능 향상을 위한 단말국 ACK 필터링 및 패킷 스케줄링 기법)

  • Kim, YongSin;Choi, Hoon;Ahn, Jaeyoung;Kim, Younghan
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.37 no.4
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    • pp.1-8
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    • 2000
  • A defect of decrease in TCP throughput can be investigated in asymmetric environment of different uplink and downlink bandwidths. Under two-way TCP traffic, the total link utilization is decreased by the successive injection of data packets in buffer. To solve these problems, terminal ACK filtering and packet scheduling mechanisms are introduced in this paper. ACK filtering eliminates the buffered ACK packets and transmits recent ACK packets in the uplink with limited bandwidth. Packet scheduling is the method of preventing 'clustering' and 'ack compression' states which are generated in the two-way TCP traffic. The guarantee of the data traffic in reverse TCP connection and the high throughput in forward TCP connection are investigated by simulation.

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Mathematical modeling and performance analysis for the double-dwell serial search algorithm with a search window (탐색 창을 갖는 이중드웰 직렬 동기획득 방식에 대한 수학적 모델링 및 성능분석)

  • Lee, Seong-Joo;Kim, Jae-Seok
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.36S no.9
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    • pp.9-17
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    • 1999
  • In this paper, we present a mathematical modeling and perform a performance analysis of double-dwell serial search algorithm, which has a search window concept, for pilot channel in DS-CDMA(Direct Sequence Code Division Multiple Access). We derive a code detection function, a false alarm function, a code miss function, and a mean code acquisition time for the performance analysis. We calculate the mean code acquisition time of the mathematical model in IS-95 forward link and compare it with that of the conventional search methods. The performance of the code acquisition system is also evaluated to investigate the effect of dwell times and search window size. The JTC channel model, which is a PCS channel model in North America, is used for the analysis. The numerical result shows that the mean code acquisition time of the double-dwell serial search algorithm with a search window is reduced by about 17%~25% than those of the conventional ones.

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A Study on Antenna VSWR Measurement Method of Mobile Communication System (이동통신시스템의 안테나 정재파비 측정방법에 관한 연구)

  • Jeong, Ki-Hyeok;Ra, Keuk-Hwan
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.9 s.339
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    • pp.65-70
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    • 2005
  • For the base station or repeater which is in operation as part of a mobile communication system, any kind of degradation in antenna performance such as lowered gam or increased VSWR which maybe due to aging of antenna, connector corrosion or other environmental factors, is difficult to detect and react to immediately. In this paper, a VSWR measurement device which is capable of detecting the VSWR of a PCS forward path ($1,840\~1,870$MHz) antenna in operation in real time without any interruption in service is developed. Such regular measurement will allow the prediction of any serious failures and insure reliable operation of the antenna. All components of the antenna VSWR measurement device was researched so that the whole system could be produced and shown to be accurate in measuring the YSWR of an actual RF repeater in operation, proving it's effectiveness.

A High Power SP3T MMIC Switch (고출력 SP3T MMIC 스위치)

  • 정명득;전계익;박동철
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.5
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    • pp.782-787
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    • 2000
  • The monolithic single-pole three-throw(SP3T) GaAs PIN diode switch circuit for the broadband and high power application was designed, fabricated and characterized. To improve the power handling capability, buffer layers of the diode employ both low temperature buffer and superlattice buffer. The diode show the breakdown voltage of 65V and turn-on voltage of 1.3V. The monolithic integrated switch employed microstrip lines and backside via holes for low-inductance signal grounding. The vertical epitaxial PIN structure demonstrated better microwave performance than planar type structures due to lower parasitics and higher quality intrinsic region. As the large signal characteristics of the fabricated SP3T MMIC switch, the insertion loss was measured less than 0.6dB and the isolation better than 50dB when the input power was increased from 8dBM to 32dBm at 14.5GHz.

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