• Journal of the Korea Society of Computer and Information
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• v.16 no.2
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• pp.25-31
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• 2011

Principal component analysis (PCA) is a well-known method for dimensionality reduction and feature extraction. Although PCA has been applied in many areas successfully, it is sensitive to outliers due to the use of sum-square-error. Several variants of PCA have been proposed to resolve the noise sensitivity and, among the variants, improved robust fuzzy PCA (RF-PCA2) demonstrated promising results. RF-PCA2, however, still can fall into a local optimum due to equal initial membership values for all data points. Another reason comes from the fact that RF-PCA2 is based on sum-square-error although fuzzy memberships are incorporated. In this paper, a variant of RF-PCA2 called RF-PCA3 is proposed. The proposed algorithm is based on the objective function of RF-PCA2. RF-PCA3 augments RF-PCA2 with the objective function of PCA and initial membership calculation using data distribution, which make RF-PCA3 to have more chance to converge on a better solution than that of RF-PCA2. RF-PCA3 outperforms RF-PCA2, which is demonstrated by experimental results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.60-68
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• 2008

This work describes a re-configurable 10MS/s to 100MS/s, low-power 10b two-step pipeline ADC operating at a power supply from 0.5V to 1.2V. MOS transistors with a low-threshold voltage are employed partially in the input sampling switches and differential pair of the SHA and MDAC for a proper signal swing margin at a 0.5V supply. The integrated adjustable current reference optimizes the static and dynamic performance of amplifiers at 10b accuracy with a wide range of supply voltages. A signal-isolated layout improves the capacitor mismatch of the MDAC while a switched-bias power-reduction technique reduces the power dissipation of comparators in the flash ADCs. The prototype ADC in a 0.13um CMOS process demonstrates the measured DNL and INL within 0.35LSB and 0.49LSB. The ADC with an active die area of $0.98mm^2$ shows a maximum SNDR and SFDR of 56.0dB and 69.6dB, respectively, and a power consumption of 19.2mW at a nominal condition of 0.8V and 60MS/s.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.7B
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• pp.578-585
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• 2012

Location tracking system through GPS and Wi-Fi is available at no additional cost in an environment of IEEE 802.11-based wireless network. It is useful for many applications in outdoor environment. However, a previous systems used for general device to tag. It is unsuitable for power aware location tracking system because general devices is more expensive and non-optimized for tracking. The hand-off method of IEEE 802.11 standard is not enough considering power consumption. This thesis analyzes the previous location tracking systems and proposes power aware system. First, we designed and implemented tag to optimize location tracking. Next, we propose low-power hand-off method and low-power behavior model in implemented tag. The proposed hand-off method resolve power problem by using the location information and behavior model minimize power consumption of tag through power-saving mode and the concept of duty cycle. To evaluating proposed methods and system performance, we perform simulations and experiments in real environment. And then, we calculate tag's power consumption based on the actual measured current consumption of each operation. In a simulation result, the proposed behavior model and hand-off method reduced about 98%, 59% than the standard's hand-off and default behavior model.

• Journal of KIISE
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• v.42 no.8
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• pp.1057-1064
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• 2015

The tactical network is system based on wireless networking technologies that ties together surveillance reconnaissance systems, precision strike systems and command and control systems. Several alternative paths exist in the network because it is connected as a grid to improve its survivability. In addition, the network topology changes frequently as forces and combatants change their network access points while conducting operations. However, most Internet routing standards have been designed for use in stable backbone networks. Therefore, tactical networks may exhibit a deterioration in performance when these standards are implemented. In this paper, we propose Priority based Multi-Path routing with Local Optimization(PMPLO) for a tactical backbone network. The PMPLO separately manages the global and local metrics. The global metric propagates to other routers through the use of a routing protocol, and it is used for a multi-path configuration that is guaranteed to be loop free. The local metric reflects the link utilization that is used to find an alternate path when congestion occurs, and it is managed internally only within each router. It also produces traffic that has a high priority privilege when choosing the optimal path. Finally, we conducted a simulation to verify that the PMPLO can effectively distribute the user traffic among available routers.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.3 s.303
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• pp.81-90
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• 2005

When we transmit signals, which are quantized by the vector quantizer (VQ), through noisy channels, the overall performance of the coding system is very dependent on the employed quantization scheme and the channel error effect. In order to design an optimal coding system, the source and channel coding scheme should be jointly optimized as in the channel-optimized VQ. As a suboptimal approach, we may consider the robust VQ (RVQ). In RVQ, we consider developing an index assignment function for mapping the output of quantizers to channel symbols so that the effect of the channel errors is minimized. Recently, a VQ, which can reduce the encoding complexity and is called the sample-adaptive product quantizer (SAPQ), has been proposed. SAPQ has very similar quantizer structure as to the product quantizer (PQ). However, the quantization performance can be better than PQ. Further, the encoding complexity and the memory requirement for the codebooks are lower than the regular full-search VQ case. In this paper, SAPQ is employed in order to design an RVQ to channel errors by reducing the vector dimension. Discussions on the codebook structure of SAPQ and experiments are introduced in an aspect of robustness to noisy channels.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.12
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• pp.85-98
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• 1998

This paper proposes a new design method of neuro-FLC by the Lamarckian co-adaptation scheme that incorporates the backpropagation learning into the GA evolution in an attempt to find optimal design parameters (fuzzy rule base and membership functions) of application-specific FLC. The design parameters are determined by evolution and learning in a way that the evolution performs the global search and makes inter-FLC parameter adjustments in order to obtain both the optimal rule base having high covering value and small number of useful fuzzy rules and the optimal membership functions having small approximation error and good control performance while the learning performs the local search and makes intra-FLC parameter adjustments by interacting each FLC with its environment. The proposed co-adaptive design method produces better approximation ability because it includes the backpropagation learning in every generation of GA evolution, shows better control performance because the used COG defuzzifier computes the crisp value accurately, and requires small workspace because the optimization procedure of fuzzy rule base and membership functions is performed concurrently by an integrated fitness function on the same fuzzy partition. Simulation results show that the Lamarckian co-adapted FLC produces the most superior one among the differently generated FLCs in all aspects such as the number of fuzzy rules, the approximation ability, and the control performance.

• Journal of the Korean Society for Marine Environment & Energy
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• v.12 no.1
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• pp.15-22
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• 2009

Auto-navigation algorithm have been studied to avoid collision and grounding of a ship due to human error. There have been many research on collision avoidance algorithms but they have been validated little on the real coastal traffic situation. In this study, a Collision Avoidance algorithm is developed by using Fuzzy algorithm and the concept of Changeable Action Space Searching (CAS). In the first step, on a basis of collision risk calculated from fuzzy algorithm in the current time(t=to), alternative Action Space for collision avoidance is planned. In the second step, next alternative Action Space for collision avoidance in the future($t=to+{\Delta}t$) is corrected and re-planned with re-evaluated collision risk. In the third step, the safest and most effective course among Action Space is selected by using optimization method in real time. In this paper, the main features of the developed collision avoidance algorithm (CAS) are introduced. CAS is implemented in the ship-handling simulator of MOERI. The performance of CAS is tested on the situation of open sea with 3 traffic ships, whose position is assumed to be informed from AIS. Own-ship is fully autonomously navigated by autopilot including the collision avoidance algorithm, CAS. Experimental results show that own-ship can successfully avoid the collision against traffic ships and the calculated courses from CAS are reasonable.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.7 s.361
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• pp.71-80
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• 2007

This paper describes an efficient hardware design of WiBro security processor (WBSec) supporting for the security sub-layer of WiBro wireless internet system. The WBSec processor, which is based on AES (Advanced Encryption Standard) block cipher algorithm, performs data oncryption/decryption, authentication/integrity, and key encryption/decryption for packet data protection of wireless network. It carries out the modes of ECB, CTR, CBC, CCM and key wrap/unwrap with two AES cores working in parallel. In order to achieve an area-efficient implementation, two design techniques are considered; First, round transformation block within AES core is designed using a shared structure for encryption/decryption. Secondly, SubByte/InvSubByte blocks that require the largest hardware in AES core are implemented using field transformation technique. It results that the gate count of WBSec is reduced by about 25% compared with conventional LUT (Look-Up Table)-based design. The WBSec processor designed in Verilog-HDL has about 22,350 gates, and the estimated throughput is about 16-Mbps at key wrap mode and maximum 213-Mbps at CCM mode, thus it can be used for hardware design of WiBro security system.

• Journal of the Korea institute for structural maintenance and inspection
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• v.19 no.5
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• pp.92-103
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• 2015

Box-Wilson experimental design method, known as central composite design, is the design of any information-gathering exercises where variation is present. This method was devised to gather as much data as possible in spite of the low design cost. This method was employed to model the effect of mixing factors on several performances of 60 MPa high strength self compacting concrete and to numerically calculate the optimal mix proportion. The nonlinear relations between factors and responses of HSSCC were approximated in the form of second order polynomial equation. In order to characterize five performances like compressive strength, passing ability, segregation resistance, manufacturing cost and density depending on five factors like water-binder ratio, cement content, fine aggregate percentage, fly ash content and superplasticizer content, the experiments were made at the total 52 experimental points composed of 32 factorial points, 10 axial points and 10 center points. The study results showed that Box-Wilson experimental design was really effective in designing the experiments and analyzing the relation between factor and response.

• KIPS Transactions on Software and Data Engineering
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• v.2 no.2
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• pp.113-118
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• 2013

The current GPU virtualization techniques incur large overheads when executing application programs mainly due to the fine-grain time-sharing scheduling of the GPU among multiple Virtual Machines (VMs). Besides, the current techniques lack of portability, because they include the APIs for the GPU computations in the VM monitor. In this paper, we propose a low overhead and high performance GPU virtualization approach on a heterogeneous HPC system based on the open-source Xen. Our proposed techniques are tailored to the bio applications. In our virtualization framework, we allow a VM to solely occupy a GPU once the VM is assigned a GPU instead of relying on the time-sharing the GPU. This improves the performance of the applications and the utilization of the GPUs. Our techniques also allow a direct pass-through to the GPU by using the IOMMU virtualization features embedded in the hardware for the high portability. Experimental studies using microbiology genome analysis applications show that our proposed techniques based on the direct pass-through significantly reduce the overheads compared with the previous Domain0 based approaches. Furthermore, our approach closely matches the performance for the applications to the bare machine or rather improves the performance.